Ming-Hung Chang

According to our database1, Ming-Hung Chang authored at least 28 papers between 2007 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank Architecture.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022
Speed control of electric vehicle by using type-2 fuzzy neural network.
Int. J. Mach. Learn. Cybern., 2022

A Unified Grey Riccati Model.
Axioms, 2022

2021
GM(1, 1;λ) with Constrained Linear Least Squares.
Axioms, 2021

2014
A configurable 2-in-1 SRAM compiler with constant-negative-level write driver for low Vmin in 16nm Fin-FET CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2014

2013
A dual-edged triggered explicit-pulsed level converting flip-flop with a wide operation range.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013

Near-/Sub-Vth process, voltage, and temperature (PVT) sensors with dynamic voltage selection.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

2012
Design and Iso-Area V<sub>min</sub> Analysis of 9T Subthreshold SRAM With Bit-Interleaving Scheme in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs, 2012

A 0.4 V 520 nW 990 <i>μ</i>m<sup>2</sup> Fully Integrated Frequency-Domain Smart Temperature Sensor in 65 nm CMOS.
J. Low Power Electron., 2012

Parameter estimation of fuzzy neural network controller based on a modified differential evolution.
Neurocomputing, 2012

A 2kb built-in row-controlled dynamic voltage scaling near-/sub-threshold FIFO memory for WBANs.
Proceedings of Technical Program of 2012 VLSI Design, Automation and Test, 2012

An energy-efficient level converter with high thermal variation immunity for sub-threshold to super-threshold operation.
Proceedings of the IEEE 25th International SOC Conference, 2012

Design of the Self-Constructing Fuzzy Neural Network controller for a sliding door system.
Proceedings of the 2012 International Joint Conference on Neural Networks (IJCNN), 2012

2011
Adaptive self-constructing fuzzy neural network controller for hardware implementation of an inverted pendulum system.
Appl. Soft Comput., 2011

An energy-efficient 10T SRAM-based FIFO memory operating in near-/sub-threshold regions.
Proceedings of the IEEE 24th International SoC Conference, SOCC 2011, Taipei, Taiwan, 2011

Self-organizing fuzzy neural network controller design.
Proceedings of the IEEE International Conference on Systems, 2011

Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

A 1kb 9T subthreshold SRAM with bit-interleaving scheme in 65nm CMOS.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
Radial basis function neural network with sliding mode control for robotic manipulators.
Proceedings of the IEEE International Conference on Systems, 2010

Fully on-chip temperature, process, and voltage sensors.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

High efficiency power management system for solar energy harvesting applications.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

2009
A 2.1-mW 0.3V-1.0V wide locking range multiphase DLL using self-estimated SAR algorithm.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2008
A 300-mV 36-muW multiphase dual digital clock output generator with self-calibration.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2007
Reconfigurable Optical Add/Drop Multiplexer with 8.0 dB Net Gain Using Dual-Pass Amplified Scheme.
IEICE Trans. Commun., 2007

A flexible two-layer external memory management for H.264/AVC decoder.
Proceedings of the 2007 IEEE International SOC Conference, 2007

Fuzzy neural network design with switching strategy for permanent-magnet synchronous motor speed controller.
Proceedings of the IEEE International Conference on Systems, 2007

A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007


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