Yuichiro Shibata

According to our database1, Yuichiro Shibata authored at least 117 papers between 1996 and 2024.

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Bibliography

2024
Pipelined ADPCM Compression for HDR Synthesis on an FPGA.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2024

Rust-Based Memory-Safe Design of SoC FPGA Unmanned Mobile Vehicles.
Proceedings of the IEEE International Conference on Consumer Electronics, 2024

A Productive HLS Simulation Approach for Multi-FPGA Systems.
Proceedings of the IEEE International Conference on Consumer Electronics, 2024

HLS Implementation of a Building Cube Stencil Computation Framework for an FPGA Accelerator.
Proceedings of the IEEE International Conference on Consumer Electronics, 2024

2023
Real-Time Image-Based Vibration Extraction with Memory-Efficient Optical Flow and Block-Based Adaptive Filter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., March, 2023

Efficient FPGA Implementation of a Convolutional Neural Network for Surgical Image Segmentation Focusing on Recursive Structure.
Proceedings of the Complex, Intelligent and Software Intensive Systems, 2023

A Mobile-Oriented GPU Implementation of a Convolutional Neural Network for Object Detection.
Proceedings of the Complex, Intelligent and Software Intensive Systems, 2023

2022
Evaluation of Directive-based Heterogeneous Redundant Design Approaches for Functional Safety Systems on FPGAs.
Int. J. Netw. Comput., 2022

A Hardware Oriented Approximate Convex Hull Algorithm and its FPGA Implementation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

FPGA Implementation of a Stream-Based Real-Time Hardware Line Segment Detector.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2022

FPGA implementation of contour detection based on Helmholtz principle.
Proceedings of the 2022 Tenth International Symposium on Computing and Networking, CANDAR 2022, 2022

Stream Computation of 3D Approximate Convex Hulls with an FPGA.
Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022

FPGA implementation of HDR synthesis processing with image compression techniques.
Proceedings of the International Conference on Field-Programmable Technology, 2022

A Lane Detection Hardware Algorithm Based on Helmholtz Principle and Its Application to Unmanned Mobile Vehicles.
Proceedings of the International Conference on Field-Programmable Technology, 2022

FPGA Implementation of an Object Recognition System with Low Power Consumption Using a YOLOv3-tiny-based CNN.
Proceedings of the Complex, Intelligent and Software Intensive Systems - Proceedings of the 16th International Conference on Complex, Intelligent and Software Intensive Systems (CISIS-2022), June 29, 2022

2021
Evaluation of an HLS-based heterogeneous redundant design approach for functional safety systems on FPGAs.
Proceedings of the Ninth International Symposium on Computing and Networking, 2021

An FPGA-based Power-saving Particle Filter Using Dynamic Reconfiguration.
Proceedings of the Ninth International Symposium on Computing and Networking, 2021

SoC FPGA implementation of an unmanned mobile vehicle with an image transmission system over VNC.
Proceedings of the International Conference on Field-Programmable Technology, 2021

2020
CNN Architecture for Surgical Image Segmentation with Recursive Structure and Flip-Based Upsampling.
Int. J. Netw. Comput., 2020

FPGA Implementation and Evaluation of a Real-Time Image-Based Vibration Detection System with Adaptive Filtering.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020

Vision-based Automatic Strawberry Shape and Size Estimation and Classification Using Raspberry Pi.
Proceedings of the 59th Annual Conference of the Society of Instrument and Control Engineers of Japan, 2020

Fast and Memory Efficient Approximated Convex Hull Computation with FPGA.
Proceedings of the Eighth International Symposium on Computing and Networking, 2020

2019
A High Level Synthesis Approach for Application Specific DMA Controllers.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

Crossbar Implementation with Partial Reconfiguration for Stream Switching Applications on an FPGA.
Proceedings of the Parallel Computing: Technology Trends, 2019

Autonomous Vehicle Driving Using the Stream-Based Real-Time Hardware Line Detector.
Proceedings of the International Conference on Field-Programmable Technology, 2019

CNN Architecture for Surgical Image Segmentation Systems with Recursive Network Structure to Mitigate Overfitting.
Proceedings of the 2019 Seventh International Symposium on Computing and Networking, 2019

Pipelined FPGA Implementation of a Wave-Front-Fetch Graph Cut System.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2019

A Simple Heterogeneous Redundant Design Method for Finite State Machines on FPGAs.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2019

A Self-partial Reconfiguration Framework with Configuration Data Compression for Intel FPGAs.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2019

2018
FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

A new stereo formulation not using pixel and disparity models.
CoRR, 2018

An FPGA-oriented Graph Cut Algorithm for Accelerating Stereo Vision.
Proceedings of the 2018 International Conference on ReConFigurable Computing and FPGAs, 2018

Implementation of a Real-Time Image-Based Vibration Detection and Adaptive Filtering on an FPGA.
Proceedings of the 2018 Conference on Design and Architectures for Signal and Image Processing, 2018

Discussion on High Level Synthesis FPGA Design of Camera Calibration.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2018

Light-Weight Fine-Grain Dynamic Partial Reconfiguration on Xilinx FPGAs.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2018

FPGA Implementation of Lightweight Communication Protocol Processing for IoT.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2018

Storing and Compressing Video into Neural Networks by Overfitting.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2018

FPGA Structure.
Proceedings of the Principles and Structures of FPGAs., 2018

2017
Deep-pipelined FPGA Implementation of Real-time Object Tracking using a Particle Filter.
Int. J. Netw. Comput., 2017

Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017

Flexible Load-Dependent Soft-Start Method for Digital PID Control DC-DC Converter in 380Vdc System.
IEICE Trans. Commun., 2017

FPGA Implementation of A Graph Cut Algorithm For Stereo Vision.
Proceedings of the 8th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2017

FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system.
Proceedings of the International Conference on Field Programmable Technology, 2017

Power Performance Analysis of FPGA-Based Particle Filtering for Realtime Object Tracking.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2017

HLS-Based FPGA Acceleration of Building-Cube Stencil Computation.
Proceedings of the Complex, Intelligent, and Software Intensive Systems, 2017

2016
FPGA-based Real-Time Object Tracking Using a Particle Filter with Stream Architecture.
Proceedings of the Fourth International Symposium on Computing and Networking, 2016

FPGA implementation of a real-time super-resolution system using a convolutional neural network.
Proceedings of the 2016 International Conference on Field-Programmable Technology, 2016

A Redundant Design Approach with Diversity of FPGA Resource Mapping.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection.
Proceedings of the Applied Reconfigurable Computing - 12th International Symposium, 2016

2015
Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization.
SIGARCH Comput. Archit. News, 2015

Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration.
IEICE Trans. Inf. Syst., 2015

An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator.
Proceedings of the 2015 IEEE Symposium in Low-Power and High-Speed Chips, 2015

2014
A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis.
SIGARCH Comput. Archit. News, 2014

A soft-core processor for finite field arithmetic with a variable word size accelerator.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis.
Proceedings of the Reconfigurable Computing: Architectures, Tools, and Applications, 2014

2013
FPGA Implementation of Human Detection by HOG Features with AdaBoost.
IEICE Trans. Inf. Syst., 2013

Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

A Fast Runtime Visualization of a GPU-Based 3D-FDTD Electromagnetic Simulation.
Proceedings of the First International Symposium on Computing and Networking, 2013

2012
Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm.
SIGARCH Comput. Archit. News, 2012

Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation.
IEICE Trans. Inf. Syst., 2012

Deep-pipelined FPGA implementation of ellipse estimation for eye tracking.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

2011
A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU.
SIGARCH Comput. Archit. News, 2011

GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing.
SIGARCH Comput. Archit. News, 2011

Steering Time-Dependent Estimation of Posteriors with Hyperparameter Indexing in Bayesian Topic Models.
Proceedings of the Advances in Knowledge Discovery and Data Mining, 2011

Clustering Documents with Maximal Substrings.
Proceedings of the Enterprise Information Systems - 13th International Conference, 2011

Documents as a Bag of Maximal Substrings - An Unsupervised Feature Extraction for Document Clustering.
Proceedings of the ICEIS 2011, 2011

Semi-supervised Bibliographic Element Segmentation with Latent Permutations.
Proceedings of the Digital Libraries: For Cultural Heritage, Knowledge Dissemination, and Future Creation, 2011

Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
Implementation of a programming environment with a multithread model for reconfigurable systems.
SIGARCH Comput. Archit. News, 2010

Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator.
IPSJ Trans. Syst. LSI Des. Methodol., 2010

Unsupervised Segmentation of Bibliographic Elements with Latent Permutations.
Proceedings of the Web Information Systems Engineering - WISE 2010 Workshops, 2010

Modeling Topical Trends over Continuous Time with Priors.
Proceedings of the Advances in Neural Networks, 2010

A datapath classification method for FPGA-based scientific application accelerator systems.
Proceedings of the International Conference on Field-Programmable Technology, 2010

Infinite latent process decomposition.
Proceedings of the 2010 IEEE International Conference on Bioinformatics and Biomedicine Workshops, 2010

Highly efficient mapping of the Smith-Waterman algorithm on CUDA-compatible GPUs.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

2009
A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation.
Comput. Sci. Res. Dev., 2009

Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining.
Proceedings of the Advances in Data and Web Management, Joint International Conferences, 2009

A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices.
Proceedings of the Next-Generation Applied Intelligence, 2009

Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

Dynamic hyperparameter optimization for bayesian topical trend analysis.
Proceedings of the 18th ACM Conference on Information and Knowledge Management, 2009

Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator.
Proceedings of the Reconfigurable Computing: Architectures, 2009

Accelerating Phase Correlation Functions Using GPU and FPGA.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2009

Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation.
Proceedings of the Advanced Data Mining and Applications, 5th International Conference, 2009

2008
Practical implementation of a network-based stochastic biochemical simulation system on an FPGA.
Proceedings of the FPL 2008, 2008

An optimization method of DMA transfer for a general purpose reconfigurable machine.
Proceedings of the FPL 2008, 2008

Retrieving 3-d information with FPGA-based stream processing.
Proceedings of the ACM/SIGDA 16th International Symposium on Field Programmable Gate Arrays, 2008

2007
An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor.
Syst. Comput. Jpn., 2007

A Framework for Implementing a Network-Based Stochastic Biochemical Simulator on an FPGA.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method.
Proceedings of the FPL 2007, 2007

A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator.
Proceedings of the FPL 2007, 2007

Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine.
Proceedings of the FPL 2007, 2007

2006
An FPGA Implementation of High Throughput Stochastic Simulator for Large-Scale Biochemical Systems.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Performance Evaluation of an Fpga-Based Biochemical Simulator ReCSip.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005
An FPGA-Based, Multi-model Simulation Method for Biochemical Systems.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

The Design of Scalable Stochastic Biochemical Simulator on FPGA.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005

A Framework for ODE-Based Multimodel Biochemical Simulations on an FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

New Area Management Method Based on "Pressure" for Plastic Cell Architecture.
Proceedings of the Embedded and Ubiquitous Computing, 2005

Evaluation of Space Allocation Circuits.
Proceedings of the Embedded and Ubiquitous Computing, 2005

2004
Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA.
Proceedings of the Advances in Computer Systems Architecture, 2003

2001
A prototype chip of multicontext FPGA with DRAM for virtual hardware.
Proceedings of ASP-DAC 2001, 2001

2000
A Reconfigurable Stochastic Model Simulator for Analysis of Parallel Systems.
Proceedings of the Field-Programmable Logic and Applications, 2000

Dataflow Partitioning and Scheduling Algorithms for WASMII, a Virtual Hardware.
Proceedings of the Field-Programmable Logic and Applications, 2000

Reconfigurable Systems: New Activities in Asia.
Proceedings of the Field-Programmable Logic and Applications, 2000

A Virtual Hardware System on a Dynamically Reconfigurable Logic Device.
Proceedings of the 8th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), 2000

1999
Implementation and Evaluation of the Compiler for WASMII, a Virtual Hardware System.
Proceedings of the 1999 International Conference on Parallel Processing Workshops, 1999

Internal Parallelization of Data-Driven Virtual Hardware.
Proceedings of the 1999 International Conference on Parallel Processing Workshops, 1999

1998
HOSMII: A Virtual Hardware Integrated with DRAM.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

Reconfigurable Systems: Activities in Asia and South Pacific (Embedded Tutorial).
Proceedings of the ASP-DAC '98, 1998

1997
Total System Image of the Reconfigurable Machine WASMII.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1997

A reconfigurable sensor-data processing system for personal robots.
Proceedings of the Field-Programmable Logic and Applications, 7th International Workshop, 1997

1996
An Emulation System of the WASMII: A Data Driven Computer on a Virtual Hardware.
Proceedings of the Field-Programmable Logic, 1996


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