Yuyang Ye

Orcid: 0000-0002-0726-0468

Affiliations:
  • Chinese University of Hong Kong (CUHK), Department of Computer Science and Engineering, Shatin, Hong Kong


According to our database1, Yuyang Ye authored at least 17 papers between 2023 and 2025.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Learning-Driven Physically Aware Large-Scale Circuit Gate Sizing.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025

A Hybrid Domain and Pipelined Analog Computing Chain for MVM Computation.
IEEE Trans. Very Large Scale Integr. Syst., January, 2025

ARS-Flow 2.0: An enhanced design space exploration flow for accelerator-rich system based on active learning.
Integr., 2025

GraphCAD: Leveraging Graph Neural Networks for Accuracy Prediction Handling Crosstalk-affected Delays.
Proceedings of the 2025 International Symposium on Physical Design, 2025

Timing-Driven Approximate Logic Synthesis Based on Double-Chase Grey Wolf Optimizer.
Proceedings of the Design, Automation & Test in Europe Conference, 2025

2024
Timing-Driven Technology Mapping Approximation Based on Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., September, 2024

Fast and Accurate Aging-Aware Cell Timing Model via Graph Learning.
IEEE Trans. Circuits Syst. II Express Briefs, January, 2024

RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization.
Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

A Graph-Learning-Driven Prediction Method for Combined Electromigration and Thermomigration Stress on Multi-Segment Interconnects.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

ARS-Flow: A Design Space Exploration Flow for Accelerator-rich System based on Active Learning.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

An Optimization-aware Pre-Routing Timing Prediction Framework Based on Heterogeneous Graph Learning.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

Heterogeneous Graph Attention Network Based Statistical Timing Library Characterization with Parasitic RC Reduction.
Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

2023
Aging-Aware Critical Path Selection via Graph Attention Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

Optimized matrix ordering of sparse linear solver using a few-shot model for circuit simulation.
Integr., November, 2023

FPGNN-ATPG: An Efficient Fault Parallel Automatic Test Pattern Generator.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

Fast and Accurate Wire Timing Estimation Based on Graph Learning.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

Graph-Learning-Driven Path-Based Timing Analysis Results Predictor from Graph-Based Timing Analysis.
Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023


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