Yves Lhuillier

According to our database1, Yves Lhuillier authored at least 20 papers between 2004 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Modelling and simulating new power grid control architectures.
Proceedings of the IEEE PES Innovative Smart Grid Technologies Europe, 2023

2017
Exploration of de Bruijn Graph Filtering for de novo Assembly Using GraphLab.
Proceedings of the 2017 IEEE International Parallel and Distributed Processing Symposium Workshops, 2017

2016
Leveraging distributed GraphLab for program trace analysis.
Proceedings of the International Conference on High Performance Computing & Simulation, 2016

2015
FPU Speedup Estimation for Task Placement Optimization on Asymmetric Multicore Designs.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

2014
Hardware Acceleration of Red-Black Tree Management and Application to Just-In-Time Compilation.
J. Signal Process. Syst., 2014

HARS: A hardware-assisted runtime software for embedded many-core architectures.
ACM Trans. Embed. Comput. Syst., 2014

Parallel Architecture Benchmarking: From Embedded Computing to HPC, a FiPS Project Perspective.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

A unified methodology for a fast benchmarking of parallel architecture.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
SNet, a flexible, scalable network paradigm for manycore architectures.
Proceedings of the 2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2013

PACHA: Low Cost Bare Metal Development for Shared Memory Manycore Accelerators.
Proceedings of the International Conference on Computational Science, 2013

An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture.
Proceedings of the Design, Automation and Test in Europe, 2013

ARTM: a lightweight fork-join framework for many-core embedded systems.
Proceedings of the Design, Automation and Test in Europe, 2013

Hardware acceleration for Just-In-Time compilation on heterogeneous embedded systems.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2011
A small footprint interleaved multithreaded processor for embedded systems.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Dynamic routing strategy for embedded distributed architectures.
Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

Synchronous Reactive Fine Grain Tasks Management for Homogeneous Many-Core Architectures.
Proceedings of the ARCS 2011, 2011

2009
Nanocomputing Block based Multi-Context FPGA.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

2006
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs.
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 2006

2005
Symbiotic Processing: Toward a Better Balance Between Architecture, Compiler and User Efforts.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

2004
BLOB computing.
Proceedings of the First Conference on Computing Frontiers, 2004


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