Farhat Thabet

According to our database1, Farhat Thabet authored at least 11 papers between 2005 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Work in Progress: Automatic Construction of Pipeline Datapaths from High-Level HDL Code.
Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium, 2022

Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs.
Proceedings of the 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, 2022

2015
Towards an Automatic Co-generator for Manycores' Architecture and Runtime: STHORM case-study.
Proceedings of the International Conference on Computational Science, 2015

2014
HARS: A hardware-assisted runtime software for embedded many-core architectures.
ACM Trans. Embed. Comput. Syst., 2014

A Fine-Grain Variation-Aware Dynamic Vdd-Hopping AVFS Architecture on a 32 nm GALS MPSoC.
IEEE J. Solid State Circuits, 2014

2013
A fine grain variation-aware dynamic Vdd-hopping AVFS architecture on a 32nm GALS MPSoC.
Proceedings of the ESSCIRC 2013, 2013

An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture.
Proceedings of the Design, Automation and Test in Europe, 2013

2009
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis.
J. Signal Process. Syst., 2009

2007
Behavioral description model BDM for design space exploration: A case study of HIS algorithm for MC-CDMA system.
Proceedings of the 15th European Signal Processing Conference, 2007

2006
Design Space Exploration of DSP Applications Based on Behavioral Description Models.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

2005
SystemCmantic: A high level Modelling and Co-Design Framework.
Proceedings of the Forum on specification and Design Languages, 2005


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