Zacharias Hadjilambrou
Orcid: 0000-0003-2785-3612
  According to our database1,
  Zacharias Hadjilambrou
  authored at least 13 papers
  between 2015 and 2021.
  
  
Collaborative distances:
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Bibliography
  2021
Harnessing CPU Electromagnetic Emanations for Resonance-Induced Voltage-Noise Characterization.
    
  
    IEEE Trans. Computers, 2021
    
  
  2020
Performance Characterization of Simultaneous Multi-Threading and Index Partitioning for an Online Document Search Application.
    
  
    Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020
    
  
  2019
    ACM Trans. Archit. Code Optim., 2019
    
  
    Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019
    
  
  2018
    IEEE Comput. Archit. Lett., 2018
    
  
    Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018
    
  
    Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2018
    
  
An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits.
    
  
    Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
    
  
  2017
Power Integrity Analysis of a 28 nm Dual-Core ARM Cortex-A57 Cluster Using an All-Digital Power Delivery Monitor.
    
  
    IEEE J. Solid State Circuits, 2017
    
  
    Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
    
  
  2016
    IEEE Comput. Archit. Lett., 2016
    
  
  2015
14.6 An all-digital power-delivery monitor for analysis of a 28nm dual-core ARM Cortex-A57 cluster.
    
  
    Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
    
  
    Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015