Zhen Zhuang

Orcid: 0000-0002-2972-8770

According to our database1, Zhen Zhuang authored at least 17 papers between 2018 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Text-to-Image Diffusion Models Cannot Count, and Prompt Refinement Cannot Help.
CoRR, March, 2025

Neural Algorithmic Reasoning for Hypergraphs with Looped Transformers.
CoRR, January, 2025

ML-Based Fine-Grained Modeling of DC Current Crowding in Power Delivery TSVs for Face-to-Face 3D ICs.
Proceedings of the 2025 International Symposium on Physical Design, 2025

Fast Routing Algorithm for Mask Stitching Region of Ultra Large Wafer Scale Integration.
Proceedings of the 30th Asia and South Pacific Design Automation Conference, 2025

2024
A Robust Multilayer X-Architecture Global Routing System Based on Particle Swarm Optimization.
IEEE Trans. Syst. Man Cybern. Syst., September, 2024

Floorplet: Performance-Aware Floorplan Framework for Chiplet Integration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., June, 2024

2023
Multi-Product Optimization for 3D Heterogeneous Integration with D2W Bonding.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
SPTA: A Scalable Parallel ILP-Based Track Assignment Algorithm with Two-Stage Partition.
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

Multi-Package Co-Design for Chiplet Integration.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

TRADER: A Practical Track-Assignment-Based Detailed Router.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021
ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
A unified algorithm based on HTS and self-adapting PSO for the construction of octagonal and rectilinear SMT.
Soft Comput., 2020

MSFRoute: Multi-Stage FPGA Routing for Timing Division Multiplexing Technique.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
X-Architecture Steiner Minimal Tree Construction Based on Discrete Differential Evolution.
Proceedings of the Advances in Natural Computation, Fuzzy Systems and Knowledge Discovery - Proceedings of the 15th International Conference on Natural Computation, Fuzzy Systems and Knowledge Discovery (ICNC-FSKD 2019), Kunming, China, July 20-22, 2019, 2019

RDTA: An Efficient Routability-Driven Track Assignment Algorithm.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018
A novel particle swarm optimizer with multi-stage transformation and genetic operation for VLSI routing.
CoRR, 2018


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