Alper Sen

Orcid: 0000-0002-5508-6484

Affiliations:
  • Boğaziçi University, Istanbul, Turkey


According to our database1, Alper Sen authored at least 77 papers between 2002 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Parallel analysis of Ethereum blockchain transaction data using cluster computing.
Clust. Comput., 2022

Fast Witness Generation for Readable GUI Test Scenarios via Generalized Experience Replay.
IEEE Access, 2022

Fraud Detection in Blockchains using Machine Learning.
Proceedings of the Fourth International Conference on Blockchain Computing and Applications, 2022

MBET: Resilience Improvement Method for DNNs.
Proceedings of the IEEE International Conference On Artificial Intelligence Testing, 2022

2021
Functional test generation from UI test scenarios using reinforcement learning for android applications.
Softw. Test. Verification Reliab., 2021

Improving Robustness of Deep Learning Systems with Fast and Customizable Adversarial Data Generation.
Proceedings of the 2021 IEEE International Conference on Artificial Intelligence Testing, 2021

2020
Virtualization of stateful services via machine learning.
Softw. Qual. J., 2020

Testing OpenAPI Banking Payment System with Model Based Test Approach.
Proceedings of the 14th Turkish National Software Engineering Symposium, 2020

Automated Functional Test Generation Practice for a Large-Scale Android Application.
Proceedings of the 14th Turkish National Software Engineering Symposium, 2020

Machine Learning Based Bug Prediction Engine For Smart Contracts.
Proceedings of the 14th Turkish National Software Engineering Symposium, 2020

DeepSmartFuzzer: Reward Guided Test Generation For Deep Learning.
Proceedings of the Workshop on Artificial Intelligence Safety 2020 co-located with the 29th International Joint Conference on Artificial Intelligence and the 17th Pacific Rim International Conference on Artificial Intelligence (IJCAI-PRICAI 2020), 2020

Importance-driven deep learning system testing.
Proceedings of the ICSE '20: 42nd International Conference on Software Engineering, Companion Volume, Seoul, South Korea, 27 June, 2020

A Cluster Based System for Analyzing Ethereum Blockchain Transaction Data.
Proceedings of the 2020 Second International Conference on Blockchain Computing and Applications, 2020

2019
Bug Prediction of SystemC Models Using Machine Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Reinforcement Learning-Driven Test Generation for Android GUI Applications using Formal Specifications.
CoRR, 2019

DeepFault: Fault Localization for Deep Neural Networks.
Proceedings of the Fundamental Approaches to Software Engineering, 2019

2018
Analog behavioral equivalence boundary computation under the effect of process variations.
Integr., 2018

Hybrid Data Race Detection for Multicore Software.
Comput. Informatics, 2018

The relationship between evolutionary coupling and defects in large industrial software (journal-first abstract).
Proceedings of the 25th International Conference on Software Analysis, 2018

Fancymock: creating virtual services from transactions.
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018

QBE: QLearning-Based Exploration of Android Applications.
Proceedings of the 11th IEEE International Conference on Software Testing, 2018

Testing service oriented architectures using stateful service visualization via machine learning.
Proceedings of the 13th International Workshop on Automation of Software Test, 2018

TCM: Test Case Mutation to Improve Crash Detection in Android.
Proceedings of the Fundamental Approaches to Software Engineering, 2018

2017
The relationship between evolutionary coupling and defects in large industrial software.
J. Softw. Evol. Process., 2017

Evolutionary coupling measurement: Making sense of the current chaos.
Sci. Comput. Program., 2017

Android'de Cokme Tespitini Iyilestirme Amacli Model-Tabanli ve Rastgele Karma Yontem(Combining Model-Based and Random Approaches to Improve Crash Detection in Android).
Proceedings of the 11th Turkish National Software Engineering Symposium, 2017

Otomatik Sanal Servis Olusturma(Automatic Virtual Service Creation).
Proceedings of the 11th Turkish National Software Engineering Symposium, 2017

MINIME-validator: Validating hardware with synthetic parallel testcases.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2016
MINIME-GPU: Multicore Benchmark Synthesizer for GPUs.
ACM Trans. Archit. Code Optim., 2016

An analog behavioral equivalence boundary search methodology for simulink models and circuit level designs utilizing evolutionary computation.
Integr., 2016

Using Machine Learning Techniques to Detect Parallel Patterns of Multi-threaded Applications.
Int. J. Parallel Program., 2016

e-Arsiv Fatura icin Aksakliga Dayanikli Dagitik bir Sistem Tasarimi.
Proceedings of the 10th Turkish National Software Engineering Symposium, 2016

Design of a Modified Concolic Testing Algorithm with Smaller Constraints.
Proceedings of the 7th Workshop on Constraint Solvers in Testing, 2016

Defect prediction on a legacy industrial software: a case study on software with few defects.
Proceedings of the 4th International Workshop on Conducting Empirical Studies in Industry, 2016

2015
MINIME: Pattern-Aware Multicore Benchmark Synthesizer.
IEEE Trans. Computers, 2015

Thread-level synthetic benchmarks for multicore systems.
Microprocess. Microsystems, 2015

Büyüyen Kısmi Yol Kısıtlarıyla Konkolik Test.
Proceedings of the 9th Turkish National Software Engineering Symposium, 2015

Kullanıcı Tarafında eBelge Oluşturma ve Yazdırma Yazılım Deneyimleri.
Proceedings of the 9th Turkish National Software Engineering Symposium, 2015

2014
Değişiklik Bağlaşımı ve Yazılım Hataları İlişkisinin İncelenmesi.
Proceedings of the 8th Turkish National Software Engineering Symposium, 2014

Hybrid dynamic data race detection in systemC.
Proceedings of the 2014 Forum on Specification and Design Languages, 2014

The effect of evolutionary coupling on software defects: an industrial case study on a legacy system.
Proceedings of the 2014 ACM-IEEE International Symposium on Empirical Software Engineering and Measurement, 2014

Fast System Level Benchmarks for Multicore Architectures.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
LLVMVF: A Generic Approach for Verification of Multicore Software.
J. Electron. Test., 2013

Analog layer extensions for analog/mixed-signal assertion languages.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Yazılım Depoları Madenciliği ile Endüstriyel Yazılım Evrimi İncelemesi.
Proceedings of the 7th National Software Engineering Symposium, 2013

Integrating circuit analyses for assertion-based verification of programmable AMS circuits.
Proceedings of the 2013 Forum on specification and Design Languages, 2013

2012
Verification and coverage of message passing multicore applications.
ACM Trans. Design Autom. Electr. Syst., 2012

A Heterogeneous Simulation and Modeling Framework for Automation Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

High-Level verifiable data-path Synthesis for DSP systems.
Proceedings of the 20th Signal Processing and Communications Applications Conference, 2012

Using software architectural patterns for synthetic embedded multicore benchmark development.
Proceedings of the 2012 IEEE International Symposium on Workload Characterization, 2012

Using haloes in mixed-signal assertion based verification.
Proceedings of the 2012 IEEE International High Level Design Validation and Test Workshop, 2012

A Verifiable High Level Data Path Synthesis Framework.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Verification coverage of embedded multicore applications.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Generation of TLM testbenches using mutation testing.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2011
Concurrency-oriented verification and coverage of system-level designs.
ACM Trans. Design Autom. Electr. Syst., 2011

Special Issue on the 9th International Symposium on Parallel and Distributed Computing.
Sci. Program., 2011

Speeding Up Cycle Based Logic Simulation Using Graphics Processing Units.
Int. J. Parallel Program., 2011

Verification Tests for MCAPI.
Proceedings of the 12th International Workshop on Microprocessor Test and Verification, 2011

2010
Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces.
Int. J. Found. Comput. Sci., 2010

Using Graphics Processing Units for Logic Simulation of Electronic Designs.
Proceedings of the 11th International Workshop on Microprocessor Test and Verification, 2010

Parallel Cycle Based Logic Simulation Using Graphics Processing Units.
Proceedings of the Ninth International Symposium on Parallel and Distributed Computing, 2010

Coverage metrics for verification of concurrent SystemC designs using mutation testing.
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems.
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010

2009
Mutation Operators for Concurrent SystemC Designs.
Proceedings of the 10th International Workshop on Microprocessor Test and Verification, 2009

2008
Predictive runtime verification of multi-processor SoCs in SystemC.
Proceedings of the 45th Design Automation Conference, 2008

2007
Solving Computation Slicing Using Predicate Detection.
IEEE Trans. Parallel Distributed Syst., 2007

Formal Verification of Simulation Traces Using Computation Slicing.
IEEE Trans. Computers, 2007

Application of Automated Model Generation Techniques to Analog/Mixed-Signal Circuits.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

Runtime Verification of k-Mutual Exclusion for SoCs.
Proceedings of the Eighth International Workshop on Microprocessor Test and Verification (MTV 2007), 2007

2006
Error Diagnosis in Equivalence Checking of High Performance Microprocessors.
Proceedings of the Workshop on Verification and Debugging, 2006

2005
Establishing latch correspondence for embedded circuits of PowerPC microprocessors.
Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

2004
Formal Verification of a System-on-Chip Using Computation Slicing.
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Finding Satisfying Global States: All for One and One for All.
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

2003
Partial Order Trace Analyzer (POTA) for Distributed Programs.
Proceedings of the Third Workshop on Run-time Verification, 2003

Detecting Temporal Logic Predicates in Distributed Programs Using Computation Slicing.
Proceedings of the Principles of Distributed Systems, 7th International Conference, 2003

On Checking Whether a Predicate Definitely Holds.
Proceedings of the Formal Approaches to Software Testing, 2003

2002
Detecting Temporal Logic Predicates on the Happened-Before Model.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002


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