Andrew Waterman

According to our database, Andrew Waterman authored at least 16 papers between 2009 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Managing Chip Design Complexity in the Domain-Specific SoC Era.

Yunsup Lee, Andrew Waterman

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019

FASED: FPGA-Accelerated Simulation and Evaluation of DRAM.

David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2017

Microprocessor chip with photonic I/O.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael S. Georgas, Andrew S. Waterman, Jeffrey M. Shainline, Rimas R. Avizienis, Sen Lin, Benjamin R. Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry M. Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Proceedings of the Optical Fiber Communications Conference and Exhibition, 2017

2016

Design of the RISC-V Instruction Set Architecture.

Andrew Waterman

PhD thesis, 2016

An Agile Approach to Building RISC-V Microprocessors.

Yunsup Lee, Andrew Waterman, Henry Cook, Brian Zimmer, Ben Keller, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Rimas Avizienis, Brian C. Richards, Jonathan Bachrach, David A. Patterson, Elad Alon, Bora Nikolic, Krste Asanovic

IEEE Micro, 2016

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Steven Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

IEEE J. Solid State Circuits, 2016

2015

Single-chip microprocessor that communicates directly using light.

Chen Sun, Mark T. Wade, Yunsup Lee, Jason S. Orcutt, Luca Alloatti, Michael Georgas, Andrew Waterman, Jeffrey M. Shainline, Rimas Avizienis, Sen Lin, Benjamin Moss, Rajesh Kumar, Fabio Pavanello, Amir H. Atabaki, Henry Cook, Albert J. Ou, Jonathan C. Leu, Yu-Hsin Chen, Krste Asanovic, Rajeev J. Ram, Milos A. Popovic, Vladimir Marko Stojanovic

Nat., 2015

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI.

Brian Zimmer, Yunsup Lee, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Hanh-Phuc Le, Po-Hung Chen, Nicholas Sutardja, Rimas Avizienis, Andrew Waterman, Brian C. Richards, Philippe Flatresse, Elad Alon, Krste Asanovic, Borivoje Nikolic

Proceedings of the Symposium on VLSI Circuits, 2015

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking.

Yunsup Lee, Brian Zimmer, Andrew Waterman, Alberto Puggelli, Jaehwa Kwak, Ruzica Jevtic, Ben Keller, Stevo Bailey, Milovan Blagojevic, Pi-Feng Chiu, Henry Cook, Rimas Avizienis, Brian C. Richards, Elad Alon, Borivoje Nikolic, Krste Asanovic

Proceedings of the 2015 IEEE Hot Chips 27 Symposium (HCS), 2015

2014

A 45nm 1.3GHz 16.7 double-precision GFLOPS/W RISC-V processor with vector accelerators.

Yunsup Lee, Andrew Waterman, Rimas Avizienis, Henry Cook, Chen Sun, Vladimir Stojanovic, Krste Asanovic

Proceedings of the ESSCIRC 2014, 2014

2013

The RISC-V instruction set.

Andrew Waterman, Yunsup Lee, Rimas Avizienis, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

Measuring the gap between programmable and fixed-function accelerators: A case study on speech recognition.

Yunsup Lee, David Sheffield, Andrew Waterman, Michael J. Anderson, Kurt Keutzer, Krste Asanovic

Proceedings of the 2013 IEEE Hot Chips 25 Symposium (HCS), 2013

2012

Chisel: constructing hardware in a Scala embedded language.

Jonathan Bachrach, Huy Vo, Brian C. Richards, Yunsup Lee, Andrew Waterman, Rimas Avizienis, John Wawrzynek, Krste Asanovic

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2010

A case for FAME: FPGA architecture model execution.

Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bird, Krste Asanovic, David A. Patterson

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

RAMP gold: an FPGA-based architecture simulator for multiprocessors.

Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yunsup Lee, Henry Cook, David A. Patterson, Krste Asanovic

Proceedings of the 47th Design Automation Conference, 2010

2009

Roofline: an insightful visual performance model for multicore architectures.

Samuel Williams, Andrew Waterman, David A. Patterson

Commun. ACM, 2009