Brian Foutz

According to our database, Brian Foutz authored at least 11 papers between 2002 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

PPA Optimization of Test Points in Automotive Designs.

Brian Foutz, Sarthak Singhal, Prateek Kumar Rai, Krishna Chakravadhanula, Vivek Chickermane, Bharath Nandakumar, Sameer Chillarige, Christos Papameletis, Satish Ravichandran

Proceedings of the IEEE International Test Conference, 2022

2019

Optimized Physical DFT Synthesis of Unified Compression and LBIST for Automotive Applications.

Christos Papameletis, Vivek Chickermane, Brian Foutz, Sarthak Singhal, Krishna Chakravadhanula

Proceedings of the IEEE International Test Conference, 2019

2017

Advancing test compression to the physical dimension.

Krishna Chakravadhanula, Vivek Chickermane, Paul Cunningham, Brian Foutz, Dale Meehl, Louis Milano, Christos Papameletis, David Scott, Steev Wilcox

Proceedings of the IEEE International Test Conference, 2017

2014

Efficient testing of hierarchical core-based SOCs.

Brion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, Akhil Garg, Richard Schoonover, James Sage, Don Pearl, Thomas J. Snethen

Proceedings of the 2014 International Test Conference, 2014

2010

Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression.

Anis Uzzaman, Brion L. Keller, Brian Foutz, Sandeep Bhatia, Thomas Bartenstein, Masayuki Arai, Kazuhiko Iwasaki

IEICE Trans. Inf. Syst., 2010

Low cost at-speed testing using On-Product Clock Generation compatible with test compression.

Brion L. Keller, Krishna Chakravadhanula, Brian Foutz, Vivek Chickermane, R. Malneedi, Thomas J. Snethen, Vikram Iyengar, David E. Lackey, Gary Grise

Proceedings of the 2011 IEEE International Test Conference, 2010

2008

Optimizing Test Data Volume Using Hybrid Compression.

Brion L. Keller, Sandeep Bhatia, Thomas Bartenstein, Brian Foutz, Anis Uzzaman

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007

Low Power Reduced Pin Count Test Methodology.

Krishna Chakravadhanula, Nitin Parimi, Brian Foutz, Bing Li, Vivek Chickermane

Proceedings of the 16th Asian Test Symposium, 2007

2006

Automation of IEEE 1149.6 Boundary Scan Synthesis in an ASIC Methodology.

Brian Foutz, Vivek Chickermane, Bing Li, Harry Linzer, Gary Kunselman

Proceedings of the 15th Asian Test Symposium, 2006

2004

Channel Masking Synthesis for Efficient On-Chip Test Compression.

Vivek Chickermane, Brian Foutz, Brion L. Keller

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2002

Efficient stimulus independent timing abstraction model based on a new concept of circuit block transparency.

Martin Foltin, Brian Foutz, Sean Tyler

Proceedings of the 39th Design Automation Conference, 2002