Chao Zhang

According to our database, Chao Zhang authored at least 21 papers between 2011 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.

Jingchen Zhu, Guangyu Sun, Xian Zhang, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

2018

Shadow Block: Accelerating ORAM Accesses with Data Duplication.

Xian Zhang, Guangyu Sun, Peichen Xie, Chao Zhang, Yannan Liu, Lingxiao Wei, Qiang Xu, Chun Jason Xue

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

PM3: Power Modeling and Power Management for Processing-in-Memory.

Chao Zhang, Tong Meng, Guangyu Sun

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2018

2016

Perspectives of Racetrack Memory for Large-Capacity On-Chip Memory: From Device to System.

Yue Zhang, Chao Zhang, Jiang Nan, Zhizhong Zhang, Xueying Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Statistical Cache Bypassing for Non-Volatile Memory.

Guangyu Sun, Chao Zhang, Peng Li, Tao Wang, Yiran Chen

IEEE Trans. Computers, 2016

Accelerate context switch by racetrack-SRAM hybrid cells.

Weiqi Zhang, Chao Zhang, Guangyu Sun

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

np-ECC: Nonadjacent position error correction code for racetrack memory.

Xiaoyang Wang, Chao Zhang, Xian Zhang, Guangyu Sun

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Exploring Main Memory Design Based on Racetrack Memory Technology.

Qingda Hu, Guangyu Sun, Jiwu Shu, Chao Zhang

Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Pin Tumbler Lock: A shift based encryption mechanism for racetrack memory.

Hongbin Zhang, Chao Zhang, Xian Zhang, Guangyu Sun, Jiwu Shu

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

Performance-centric register file design for GPUs using racetrack memory.

Shuo Wang, Yun Liang, Chao Zhang, Xiaolong Xie, Guangyu Sun, Yongpan Liu, Yu Wang, Xiuhong Li

Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2015

Exploring data placement in racetrack memory based scratchpad memory.

Haiyu Mao, Chao Zhang, Guangyu Sun, Jiwu Shu

Proceedings of the IEEE Non-Volatile Memory System and Applications Symposium, 2015

Fork path: improving efficiency of ORAM by removing redundant memory accesses.

Xian Zhang, Guangyu Sun, Chao Zhang, Weiqi Zhang, Yun Liang, Tao Wang, Yiran Chen, Jia Di

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Perspectives of racetrack memory based on current-induced domain wall motion: From device to system.

Yue Zhang, Chao Zhang, Jacques-Olivier Klein, Dafine Ravelosona, Guangyu Sun, Weisheng Zhao

Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015

Hi-fi playback: tolerating position errors in shift operations of racetrack memory.

Chao Zhang, Guangyu Sun, Xian Zhang, Weiqi Zhang, Weisheng Zhao, Tao Wang, Yun Liang, Yongpan Liu, Yu Wang, Jiwu Shu

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

From device to system: cross-layer design exploration of racetrack memory.

Guangyu Sun, Chao Zhang, Hehe Li, Yue Zhang, Weiqi Zhang, Yizi Gu, Yinan Sun, Jacques-Olivier Klein, Dafine Ravelosona, Yongpan Liu, Weisheng Zhao, Huazhong Yang

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

An energy efficient backup scheme with low inrush current for nonvolatile SRAM in energy harvesting sensor nodes.

Hehe Li, Yongpan Liu, Qinghang Zhao, Yizi Gu, Xiao Sheng, Guangyu Sun, Chao Zhang, Meng-Fan Chang, Rong Luo, Huazhong Yang

Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Quantitative modeling of racetrack memory, a tradeoff among area, performance, and power.

Chao Zhang, Guangyu Sun, Weiqi Zhang, Fan Mi, Hai Li, Weisheng Zhao

Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2014

SBAC: a statistics based cache bypassing method for asymmetric-access caches.

Chao Zhang, Guangyu Sun, Peng Li, Tao Wang, Dimin Niu, Yiran Chen

Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013

Asymmetric-access aware optimization for STT-RAM caches with process variations.

Yi Zhou, Chao Zhang, Guangyu Sun, Kun Wang, Yu Zhang

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

An efficient run-time encryption scheme for non-volatile main memory.

Xian Zhang, Chao Zhang, Guangyu Sun, Jia Di, Tao Zhang

Proceedings of the International Conference on Compilers, 2013

2011

Fabrication cost analysis for 2D, 2.5D, and 3D IC designs.

Chao Zhang, Guangyu Sun

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011