Chris Winstead

Fakhreddine Ghaffari

IEEE Commun. Lett., July, 2023

STAMINA in C++: Modernizing an Infinite-State Probabilistic Model Checker.

[BibT_eX]

[DOI]

Proceedings of the Quantitative Evaluation of Systems - 20th International Conference, 2023

2022

Counterexample Generation for Infinite-State Chemical Reaction Networks.

[BibT_eX]

[DOI]

CoRR, 2022

2020

Decoding LDPC Codes with Probabilistic Local Maximum Likelihood Bit Flipping.

[BibT_eX]

[DOI]

Rejoy Roy Mathews

Proceedings of the International Symposium on Information Theory and Its Applications, 2020

2019

A Probabilistic Parallel Bit-Flipping Decoder for Low-Density Parity-Check Codes.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Resilient Control Design for Vehicular Platooning in an Adversarial Environment.

[BibT_eX]

[DOI]

Proceedings of the 2019 American Control Conference, 2019

2018

Analysis of Friendly Jamming for Secure Location Verification of Vehicles for Intelligent Highways.

[BibT_eX]

[DOI]

IEEE Trans. Veh. Technol., 2018

Collaborative Attacks on Autonomous Vehicle Platooning.

[BibT_eX]

[DOI]

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Recent Advances on Stochastic and Noise Enhanced Methods in Error Correction Decoders.

[BibT_eX]

[DOI]

Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018

Reachable Set Analysis of Vehicular Platooning in Adversarial Environment.

[BibT_eX]

[DOI]

Proceedings of the 2018 Annual American Control Conference, 2018

Identification of the Attacker in Cyber-Physical Systems with an Application to Vehicular Platooning in Adversarial Environment.

[BibT_eX]

[DOI]

Proceedings of the 2018 Annual American Control Conference, 2018

2017

Viability of Using Shadows Cast by Vehicles for Position Verification in Vehicle Platooning.

[BibT_eX]

[DOI]

Tasnuva Tithi

Ryan M. Gerdes

Proceedings of the 2017 IEEE Trustcom/BigDataSE/ICESS, Sydney, Australia, August 1-4, 2017, 2017

2016

ASIC Design of a Noisy Gradient Descent Bit Flip Decoder for 10GBASE-T Ethernet Standard.

[BibT_eX]

[DOI]

CoRR, 2016

Noise-aided gradient descent bit-flipping decoders approaching maximum likelihood decoding.

[BibT_eX]

[DOI]

Proceedings of the 9th International Symposium on Turbo Codes and Iterative Information Processing, 2016

CNTFET-RFB: An Error Correction Implementation for Multi-valued CNTFET Logic.

[BibT_eX]

[DOI]

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

2015

Decoding LDPC codes via Noisy Gradient Descent Bit-Flipping with Re-Decoding.

[BibT_eX]

[DOI]

Tasnuva Tithi

CoRR, 2015

Reliable gold code generators for GPS receivers.

[BibT_eX]

[DOI]

Mohamed Mourad Hafidhi

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Reducing the impact of internal upsets inside the correlation process in GPS Receivers.

[BibT_eX]

[DOI]

Mohamed Mourad Hafidhi

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

Reliable NCO carrier generators for GPS receivers.

[BibT_eX]

[DOI]

Mourad Dridi

Mohamed Mourad Hafidhi

Proceedings of the 2015 Conference on Design and Architectures for Signal and Image Processing, 2015

2014

Noisy Gradient Descent Bit-Flip Decoding for LDPC Codes.

[BibT_eX]

[DOI]

IEEE Trans. Commun., 2014

Error Correction via Restorative Feedback in <i>M</i>-ary Logic Circuits.

[BibT_eX]

[DOI]

J. Multiple Valued Log. Soft Comput., 2014

Stochastic Model Checking of Genetic Circuits.

[BibT_eX]

[DOI]

ACM J. Emerg. Technol. Comput. Syst., 2014

Decoding LDPC Codes With Locally Maximum-Likelihood Binary Messages.

[BibT_eX]

[DOI]

IEEE Commun. Lett., 2014

2013

A Winner-Take-All circuit with improved accuracy and tolerance to mismatch and process variations.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Muller C-element based Decoder (MCD): A decoder against transient faults.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Performance of a high-speed transcutaneous link with error correction coding.

[BibT_eX]

[DOI]

David Toribio

Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

CPS: an efficiency-motivated attack against autonomous vehicular transportation.

[BibT_eX]

[DOI]

Ryan M. Gerdes

Kevin P. Heaslip

Proceedings of the Annual Computer Security Applications Conference, 2013

2012

Ultra-Low-Power Error Correction Circuits: Technology Scaling and Sub-V<sub>T</sub> Operation.

[BibT_eX]

[DOI]

Joachim Neves Rodrigues

IEEE Trans. Circuits Syst. II Express Briefs, 2012

Design and Test of Genetic Circuits Using ${\tt iBioSim}$iBioSim.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2012

Error correction circuits for bio-implantable electronics.

[BibT_eX]

[DOI]

Yi Luo

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

A space-time redundancy technique for embedded stochastic error correction.

[BibT_eX]

[DOI]

Proceedings of the 7th International Symposium on Turbo Codes and Iterative Information Processing, 2012

An LDPC decoding method for fault-tolerant digital logic.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

125Mbps ultra-wideband system evaluation for cortical implant devices.

[BibT_eX]

[DOI]

Yi Luo

Patrick Chiang

Proceedings of the Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2012

Utilizing stochastic model checking to analyze genetic circuits.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology, 2012

2011

An Error Correction Method for Binary and Multiple-Valued Logic.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

2010

Relaxation dynamics in stochastic iterative decoders.

[BibT_eX]

[DOI]

Saeed Sharifi Tehrani

IEEE Trans. Signal Process., 2010

iSSA: An incremental stochastic simulation algorithm for genetic circuits.

[BibT_eX]

[DOI]

Curtis Madsen

Chris J. Myers

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009

A Probabilistic LDPC-Coded Fault Compensation Technique for Reliable Nanoscale Computing.

[BibT_eX]

[DOI]

Sheryl L. Howard

IEEE Trans. Circuits Syst. II Express Briefs, 2009

A dual-function mixed-signal circuit for LDPC encoding/decoding.

[BibT_eX]

[DOI]

Integr., 2009

2008

Decoding LDPC Convolutional Codes on Markov Channels.

[BibT_eX]

[DOI]

Manohar Kashyap

EURASIP J. Wirel. Commun. Netw., 2008

2007

Design for Testability of CMOS Analog Sum-Product Error-Control Decoders.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2007

2006

Low-voltage CMOS circuits for analog iterative decoders.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2006

2005

Analog Soft Decoding for Multi-Level Memories.

[BibT_eX]

[DOI]

Proceedings of the 35th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2005), 2005

Stochastic iterative decoders.

[BibT_eX]

[DOI]

Proceedings of the 2005 IEEE International Symposium on Information Theory, 2005

Digital built-in self-test of CMOS analog iterative decoders.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

An analog/digital mode-switching LDPC codec.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004

CMOS analog MAP decoder for (8, 4) Hamming code.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2004

Density evolution analysis of device mismatch in analog decoders.

[BibT_eX]

[DOI]