Daehyun Koh

Orcid: 0000-0002-5156-3423

According to our database1, Daehyun Koh authored at least 6 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
A Capacitor-Coupled Offset-Canceled Sense Amplifier for DRAMs With Reduced Variation of Decision Threshold Voltage.
IEEE J. Solid State Circuits, 2020

Optical Receiver Front-end for Active Optical Cable in 180 nm CMOS.
Proceedings of the International SoC Design Conference, 2020

2019
A 64Gb/s 2.29pJ/b PAM-4 VCSEL Transmitter With 3-Tap Asymmetric FFE in 65nm CMOS.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

56Gb/s PAM-4 VCSEL Transmitter with Quarter-Rate Forwarded Clock using 65nm CMOS Circuits.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2019

2018
25-Gb/s Clocked Pluggable Optics for High-Density Data Center Interconnections.
IEEE Trans. Circuits Syst. II Express Briefs, 2018

4-Channel Push-Pull VCSEL Drivers for HDMI Active Optical Cable in 0.18-μm CMOS.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018


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