Daniel S. Truesdell

According to our database1, Daniel S. Truesdell authored at least 13 papers between 2018 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
A 0.5-V 560-kHz 18.8-fJ/Cycle On-Chip Oscillator With 96.1-ppm/°C Steady-State Stability Using a Duty-Cycled Digital Frequency-Locked Loop.
IEEE J. Solid State Circuits, 2021

A Crystal-Less BLE Transmitter With Clock Recovery From GFSK-Modulated BLE Packets.
IEEE J. Solid State Circuits, 2021

Graph Coloring Using Coupled Oscillator-Based Dynamical Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Experimental Demonstration of a Reconfigurable Coupled Oscillator Platform to Solve the Max-Cut Problem.
CoRR, 2020

A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked Loop.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor Nodes.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

30.1 A Temperature-Robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X-Band.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

30.7 A Crystal-Less BLE Transmitter with -86dBm Freq µ ency-Hopping Back-Channel WRX and Over-the-Air Clock Recovery from a GFSK-Modulated BLE Packet.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

A- 108dBm Sensitivity, -28dB SIR, 130nW to 41µW, Digitally Reconfigurable Bit-Level Duty-Cycled Wakeup and Data Receiver.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A 2.5 ppm/°C 1.05-MHz Relaxation Oscillator With Dynamic Frequency-Error Compensation and Fast Start-Up Time.
IEEE J. Solid State Circuits, 2019

A -106dBm 33nW Bit-Level Duty-Cycled Tuned RF Wake-up Receiver.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A 640 pW 22 pJ/sample Gate Leakage-Based Digital CMOS Temperature Sensor with 0.25°C Resolution.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2019

2018
A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-up Time.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018


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