Sumanth Kamineni

According to our database1, Sumanth Kamineni authored at least 9 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2023
AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
A 194nW Energy-Performance-Aware loT SoC Employing a 5.2nW 92.6% Peak Efficiency Power Management Unit for System Performance Scaling, Fast DVFS and Energy Minimization.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022

2021
MemGen: An Open-Source Framework for Autonomous Generation of Memory Macros.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021

2020
Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation.
Proceedings of the VLSI-SoC: Design Trends, 2020

An Open-source Framework for Autonomous SoC Design with Analog Block Generation.
Proceedings of the 28th IFIP/IEEE International Conference on Very Large Scale Integration, 2020

An 85 nW IoT Node-Controlling SoC for MELs Power-Mode Management and Phantom Energy Reduction.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
A 2.5 ppm/°C 1.05-MHz Relaxation Oscillator With Dynamic Frequency-Error Compensation and Fast Start-Up Time.
IEEE J. Solid State Circuits, 2019

2018
Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications.
Proceedings of the International Symposium on Low Power Electronics and Design, 2018

A 2.5 ppm/°C 1.05 MHz Relaxation Oscillator with Dynamic Frequency-Error Compensation and 8 µs Start-up Time.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018


  Loading...