Donald S. Gardner

According to our database, Donald S. Gardner authored at least 14 papers between 2004 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection.

David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

2013

Overcoming post-silicon validation challenges through quick error detection (QED).

David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra

Proceedings of the Design, Automation and Test in Europe, 2013

2012

Bug localization techniques for effective post-silicon validation.

Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Integrated inductors with magnetic materials for on-chip power conversion.

Donald S. Gardner, Gerhard Schrom, Fabrice Paillet, Tanay Karnik, Shekhar Borkar

Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2010

Concurrent autonomous self-test for uncore components in system-on-chips.

Yanjing Li, Onur Mutlu, Donald S. Gardner, Subhasish Mitra

Proceedings of the 28th IEEE VLSI Test Symposium, 2010

QED: Quick Error Detection tests for effective post-silicon validation.

Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra

Proceedings of the 2011 IEEE International Test Conference, 2010

Design techniques for cross-layer resilience.

Nicholas P. Carter, Helia Naeimi, Donald S. Gardner

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Overcoming Early-Life Failure and Aging for Robust Systems.

Yanjing Li, Young Moon Kim, Evelyn Mintarno, Donald S. Gardner, Subhasish Mitra

IEEE Des. Test Comput., 2009

2007

High Voltage Tolerant Linear Regulator With Fast Digital Control for Biasing of Integrated DC-DC Converters.

Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik

IEEE J. Solid State Circuits, 2007

Low Voltage Buffered Bandgap Reference.

Peter Hazucha, Fabrice Paillet, Sung Tae Moon, David J. Rennie, Gerhard Schrom, Donald S. Gardner, Kenneth Ikeda, Gell Gellman, Tanay Karnik

Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

2006

A Linear Regulator with Fast Digital Control for Biasing Integrated DC-DC Converters.

Peter Hazucha, Sung Tae Moon, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner, Saravanan Rajapandian, Tanay Karnik

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

High-frequency DC-DC conversion : fact or fiction.

Tanay Karnik, Peter Hazucha, Gerhard Schrom, Fabrice Paillet, Donald S. Gardner

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005

A 233-MHz 80%-87% efficient four-phase DC-DC converter utilizing air-core inductors on package.

Peter Hazucha, Gerhard Schrom, Jaehong Hahn, Bradley A. Bloechel, Paul Hack, Gregory E. Dermer, Siva G. Narendra, Donald S. Gardner, Tanay Karnik, Vivek De, Shekhar Borkar

IEEE J. Solid State Circuits, 2005

2004

Feasibility of monolithic and 3D-stacked DC-DC converters for microprocessors in 90nm technology generation.

Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Volkan Kursun, Donald S. Gardner, Siva G. Narendra, Tanay Karnik, Vivek De

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004