Eiji Iwata

According to our database, Eiji Iwata authored at least 8 papers between 2001 and 2021.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2021

Playful Engagement for Public Spaces: A Case Study on a Mall Escalator.

Koichi Araake, Michinari Kono, Eiji Iwata, Norio Sasaki

Proc. ACM Hum. Comput. Interact., 2021

2011

Self-Assembly of Chip-Size Components with Cavity Structures: High-Precision Alignment and Direct Bonding without Thermal Compression for Hetero Integration.

Takafumi Fukushima, Takayuki Konno, Eiji Iwata, Risato Kobayashi, Toshiya Kojima, Mariappan Murugesan, Ji Chel Bea, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi

Micromachines, 2011

2010

Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature.

Takafumi Fukushima, Eiji Iwata, Jichoel Bea, Mariappan Murugesan, Kang Wook Lee, Tetsu Tanaka, Mitsumasa Koyanagi

Proceedings of the IEEE International Conference on 3D System Integration, 2010

2009

Development of a new self-assembled die bonder to three-dimensionally stack known good dies in batch.

Takafumi Fukushima, Eiji Iwata, Tetsu Tanaka, Mitsumasa Koyanagi

Proceedings of the IEEE International Conference on 3D System Integration, 2009

2007

Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI.

Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia M. Müller, Osamu Takahashi, Koji Hirairi, Atsushi Kawasumi, Hiroaki Murakami, Hiromi Noro, Shoji Onishi, Juergen Pille, Joel Silberman, Suksoon Yong, Akiyuki Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, VanDung To, Eiji Iwata

IBM J. Res. Dev., 2007

Cell Broadband Engine Architecture and its first implementation - A performance view.

Thomas Chen, Ram Raghavan, Jason N. Dale, Eiji Iwata

IBM J. Res. Dev., 2007

2006

The microarchitecture of the synergistic processor for a cell processor.

Brian K. Flachs, Shigehiro Asano, Sang H. Dhong, H. Peter Hofstee, Gilles Gervais, Roy Kim, Tien Le, Peichun Liu, Jens Leenstra, John S. Liberty, Brad W. Michael, Hwa-Joon Oh, Silvia Melitta Müller, Osamu Takahashi, A. Hatakeyama, Yukio Watanabe, Naoka Yano, Daniel A. Brokenshire, Mohammad Peyravian, Vandung To, Eiji Iwata

IEEE J. Solid State Circuits, 2006

2001

A 250-MHz single-chip multiprocessor for audio and video signal processing.

Tatsuya Koyama, Keisuke Inoue, Hirokazu Hanaki, Masahiro Yasue, Eiji Iwata

IEEE J. Solid State Circuits, 2001