Brian K. Flachs

According to our database1, Brian K. Flachs authored at least 11 papers between 1996 and 2009.

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Bibliography

2009
A Resonant Global Clock Distribution for the Cell Broadband Engine Processor.
IEEE J. Solid State Circuits, 2009

2007
Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI.
IBM J. Res. Dev., 2007

Cell Broadband Engine Processor Design Methodology.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

Implementation of the 65nm Cell Broadband Engine.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Synergistic Processing in Cell's Multicore Architecture.
IEEE Micro, 2006

2005
Power-Conscious Design of the Cell Processor's Synergistic Processor Element.
IEEE Micro, 2005

The circuit design of the synergistic processor element of a CELL processor.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2000
"Timing closure by design, " a high frequency microprocessor design methodology.
Proceedings of the 37th Conference on Design Automation, 2000

1998
The Hector Distributed Run-Time Environment.
IEEE Trans. Parallel Distributed Syst., 1998

1996
Hector: Automated Task Allocation for MPI.
Proceedings of IPPS '96, 1996

A Task Migration Implementation of the Message-Passing Interface.
Proceedings of the 5th International Symposium on High Performance Distributed Computing (HPDC '96), 1996


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