Eric Senn

According to our database1, Eric Senn authored at least 77 papers between 1998 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2022
Multi-paradigm modeling for early analysis of ROS-based robotic applications using a library of AADL models.
Proceedings of the 25th International Conference on Model Driven Engineering Languages and Systems: Companion Proceedings, 2022

2021
Introducing CPU load Analysis from AADL Models for ROS applications : a use case.
Proceedings of the 24th Forum on specification & Design Languages, 2021

2018
Joint DVFS and Parallelism for Energy Efficient and Low Latency Software Video Decoding.
IEEE Trans. Parallel Distributed Syst., 2018

2016
A Methodology for Estimating Performance and Power Consumption of Embedded Flash File Systems.
ACM Trans. Embed. Comput. Syst., 2016

Green metadata based adaptive DVFS for energy efficient video decoding.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

2015
A methodology for performance/energy consumption characterization and modeling of video decoding on heterogeneous SoC and its applications.
J. Syst. Archit., 2015

Role Framework to Support Collaborative Virtual Prototyping of System of Systems.
Proceedings of the 24th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, 2015

A role language to interpret multi-formalism System of systems models.
Proceedings of the Annual IEEE Systems Conference, 2015

2014
Revisiting read-ahead efficiency for raw NAND flash storage in embedded Linux.
SIGBED Rev., 2014

Flashmon V2: monitoring raw NAND flash memory I/O requests on embedded Linux.
SIGBED Rev., 2014

On the energy efficiency of parallel multi-core <i>vs</i> hardware accelerated HD video decoding.
SIGBED Rev., 2014

DyPS: dynamic processor switching for energy-aware video decoding on multi-core SoCs.
SIGBED Rev., 2014

A Tracing Toolset for Embedded Linux Flash File Systems.
Proceedings of the 8th International Conference on Performance Evaluation Methodologies and Tools, 2014

Open-PEOPLE, A Collaborative Platform for Remote & Accurate Measurement and Evaluation of Embedded Systems Power Consumption.
Proceedings of the IEEE 22nd International Symposium on Modelling, 2014

A Comparison Between Ambient Assisted Living Systems.
Proceedings of the Smart Homes and Health Telematics - 12th International Conference, 2014

On the Energy Efficiency of Parallel Multi-core vs Hardware Accelerated HD Video Decoding.
Proceedings of the Embed With Linux 2014 Workshop, Lisboa, Portugal, November 13-14, 2014., 2014

Towards a Dynamic Infrastructure for Playing with Systems of Systems.
Proceedings of the ECSA 2014 Workshops & Tool Demos Track, 2014

Flexible Model-Based Simulation as a System's Design Driver.
Proceedings of the Poster Workshop at the 2014 Complex Systems Design & Management International Conference co-located with 5th International Conference on Complex System Design & Management (CSD&M 2014), 2014

2013
An Efficient Framework for Power-Aware Design of Heterogeneous MPSoC.
IEEE Trans. Ind. Informatics, 2013

Toward a Unified Performance and Power Consumption NAND Flash Memory Model of Embedded and Solid State Secondary Storage Systems.
CoRR, 2013

Evaluation of the Performance/Energy Overhead in DSP Video Decoding and its Implications.
CoRR, 2013

GPP vs DSP: A Performance/Energy Characterization and Evaluation of Video Decoding.
Proceedings of the 2013 IEEE 21st International Symposium on Modelling, 2013

Energy Consumption Modeling of H.264/AVC Video Decoding for GPP and DSP.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
On benchmarking embedded Linux flash file systems.
SIGBED Rev., 2012

Accurate energy characterization of OS services in embedded systems.
EURASIP J. Embed. Syst., 2012

Performance Evaluation of Flash File Systems
CoRR, 2012

Functional validation of AADL models via model transformation to SystemC with ATL.
Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, 2012

QAML: a multi-paradigm DSML for quantitative analysis of embedded system architecture models.
Proceedings of the 6th International Workshop on Multi-Paradigm Modeling, 2012

Energy modelling of embedded multimedia streaming applications with GStreamer on heterogeneous MPSoC.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

An efficient power estimation methodology for complex RISC processor-based platforms.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012

Realistic energy modeling of scheduling, interprocess-communication and context switch routines.
Proceedings of the 7th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2012

Open-People: Open Power and Energy Optimization PLatform and Estimator.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Energy Characterization and Classification of Embedded Operating System Services.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Open-people: An open platform for estimation and optimizations of energy consumption.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Consumption analysis and estimation in the design of GStreamer based multimedia applications.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Micro-benchmarking Flash Memory File-System Wear Leveling and Garbage Collection: A Focus on Initial State Impact.
Proceedings of the 15th IEEE International Conference on Computational Science and Engineering, 2012

Modelling the Power and Energy Consumption of NIOS II Softcores on FPGA.
Proceedings of the 2012 IEEE International Conference on Cluster Computing Workshops, 2012

2011
AADL Extension to Model Classical FPGA and FPGA Embedded within a SoC.
Int. J. Reconfigurable Comput., 2011

Defining an annex language to the architecture analysis and design language for requirements engineering activities support.
Proceedings of the First Model-Driven Requirements Engineering Workshop, 2011

Hybrid system level power consumption estimation for FPGA-based MPSoC.
Proceedings of the IEEE 29th International Conference on Computer Design, 2011

Fast and accurate hybrid power estimation methodology for embedded systems.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Embedded operating systems energy overhead.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
Energy modeling of the virtual memory subsystem for real-time embedded systems.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

2009
Energy and Power Consumption Estimation for Embedded Applications and Operating Systems.
J. Low Power Electron., 2009

Model Driven High-Level Power Estimation of Embedded Operating Systems Communication Services.
Proceedings of the International Conference on Embedded Software and Systems, 2009

Using Integer Linear Programming in Test-bench Generation for Evaluating Communication Processors.
Proceedings of the 12th Euromicro Conference on Digital System Design, 2009

2008
Estimation et optimisation de la consommation des mémoires.
Tech. Sci. Informatiques, 2008

Refining Power Consumption Estimations in the Component-based AADL Design Flow.
Proceedings of the Forum on specification and Design Languages, 2008

Power and Energy Estimations in Model-Based Design.
Proceedings of the Languages for Embedded Systems and their Applications, 2008

2007
Méthodes et outils d'estimation de la consommation de code embarqué sur processeur.
Tech. Sci. Informatiques, 2007

2006
Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI
CoRR, 2006

Memory Aware High-Level Synthesis for Embedded Systems
CoRR, 2006

A Memory Aware High Level Synthesis Too
CoRR, 2006

Intégration de la synthèse mémoire dans l'outil de synthèse d'architecture GAUT Low Power
CoRR, 2006

Building and Using System, Algorithmic, and Architectural Power and Energy Models in the FPGA Design.
Proceedings of the 2nd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2006

2005
SoftExplorer: Estimating and Optimizing the Power and Energy Consumption of a C Program for DSP Applications.
EURASIP J. Adv. Signal Process., 2005

Power/Energy Estimation in SoCs by Multi-Level Parametric Modeling.
Proceedings of the 1st International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2005

High-level synthesis under I/O timing and memory constraints.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A more efficient and flexible DSP design flow from Matlab-Simulink [FFT algorithm example].
Proceedings of the 2005 IEEE International Conference on Acoustics, 2005

2004
SoftExplorer: Estimation, Characterization, and Optimization of the Power and Energy Consumption at the Algorithmic Level.
Proceedings of the Integrated Circuit and System Design, 2004

A Memory Aware High Level Synthesis Tool .
Proceedings of the 2004 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2004), 2004

A memory aware behavioral synthesis tool for real-time VLSI circuits.
Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

A Complete Methodology for Memory Optimization in DSP Applications.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

Memory Aware HLS and the Implementation of Ageing Vectors.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

Functional Level Power Analysis: An Efficient Approach for Modeling the Power Consumption of Complex Processors.
Proceedings of the 2004 Design, 2004

Memory accesses management during high level synthesis.
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004

2003
Power Consumption Modeling and Characterization of the TI C6201.
IEEE Micro, 2003

2002
Power Consumption Estimation of a C Program for Data-Intensive Applications.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Power Estimation of a C Algorithm Based on the Functional-Level Power Analysis of a Digital Signal Processor.
Proceedings of the High Performance Computing, 4th International Symposium, 2002

2001
A Vision System on Chip for Industrial Control.
Proceedings of the SOC Design Methodologies, 2001

A smart "single line" pixel sensor for industrial vision.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

2000
Hazard-free self-timed design: methodology and application.
Integr. Comput. Aided Eng., 2000

Designing a low-power (self-timed) router for a MIMD computer.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Examples of Image Processing to Benefit from an Asynchronous Implementation.
Proceedings of the Fifth International Workshop on Computer Architectures for Machine Perception (CAMP 2000), 2000

1999
Hazard-Free Self-Timed Design: Methodology and Application to Asynchronous Routing in an Heterogeneous Parallel Machine.
J. VLSI Signal Process., 1999

Self-Timed Design: An Avenue to Complex Computer Systems.
Proceedings of the 32nd Annual Hawaii International Conference on System Sciences (HICSS-32), 1999

1998
A Self Timed Asynchronous Router for an Heterogeneous Parallel Machine.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998


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