Hirohito Higashi

According to our database, Hirohito Higashi authored at least 7 papers between 2005 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

Concurrent Execution in Scripting Programming Language 'mruby'.

Kazuaki Tanaka, Hiroyuki Maeda, Hirohito Higashi

Proceedings of the Computational Science and Its Applications - ICCSA 2018, 2018

2017

mruby - Rapid IoT Software Development.

Kazuaki Tanaka, Hirohito Higashi

Proceedings of the Computational Science and Its Applications - ICCSA 2017, 2017

2016

A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.

Hiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Noriaki Shirai, Shigeaki Kawai, Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata, Yasufumi Sakai, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura, Yutaka Ide, Kazuhiro Terashima, Hirohito Higashi, Tomokazu Higuchi, Naoaki Naka

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

3.5 A 56Gb/s NRZ-electrical 247mW/lane serial-link transceiver in 28nm CMOS.

Takayuki Shibasaki, Takumi Danjo, Yuuki Ogata, Yasufumi Sakai, Hiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Shigeaki Kawai, Tomoyuki Arai, Hirohito Higashi, Naoaki Naka, Hisakatsu Yamaguchi, Toshihiko Mori, Yoichi Koyanagi, Hirotaka Tamura

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015

A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOS.

Hiroki Miyaoka, Futoshi Terasawa, Masahiro Kudo, Hideki Kano, Atsushi Matsuda, Noriaki Shirai, Shigeaki Kawai, Tomoyuki Arai, Yutaka Ide, Kazuhiro Terashima, Hirohito Higashi, Tomokazu Higuchi, Naoaki Naka

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2005

A 5-6.4-Gb/s 12-channel transceiver with pre-emphasis and equalization.

Hirohito Higashi, Syunitirou Masaki, Masaya Kibune, Satoshi Matsubara, Takaya Chiba, Yoshiyasu Doi, Hisakatsu Yamaguchi, Hideki Takauchi, Hideki Ishida, Kohtaroh Gotoh, Hirotaka Tamura

IEEE J. Solid State Circuits, 2005

A 0.8-1.3V 16-channel 2.5Gb/s high-speed serial transceiver in a 90nm standard CMOS process.

Yoshiyasu Doi, Syunitirou Masaki, Takaya Chiba, Hirohito Higashi, Hisakatsu Yamaguchi, Hideki Takauchi, Hideki Ishida, Kohtaroh Gotoh, Junji Ogawa, Hirotaka Tamura

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005