Tomokazu Higuchi
According to our database1,
Tomokazu Higuchi
authored at least 4 papers
between 2010 and 2019.
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Bibliography
2019
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019
2016
A 28.3 Gb/s 7.3 pJ/bit 35 dB backplane transceiver with eye sampling phase adaptation in 28 nm CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016
2015
A 28-Gb/s 4.5-pJ/bit transceiver with 1-tap decision feedback equalizer in 28-nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015
2010
A 5Gb/s transceiver with an ADC-based feedforward CDR and CMA adaptive equalizer in 65nm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2010