Yipeng Wang
Orcid: 0000-0002-4488-0797Affiliations:
- Xilinx, Singapore
- Hong Kong University of Science and Technology, Hong Kong, SAR, China (former)
According to our database1,
Yipeng Wang
authored at least 14 papers
between 2013 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2022
IEEE J. Solid State Circuits, 2022
2021
A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET.
IEEE J. Solid State Circuits, 2021
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021
2020
A 42-dB Ω 25-Gb/s CMOS Transimpedance Amplifier With Multiple-Peaking Scheme for Optical Communications.
IEEE Trans. Circuits Syst. II Express Briefs, 2020
6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2018
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2015
IEEE Trans. Circuits Syst. I Regul. Pap., 2015
A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks.
Proceedings of the ESSCIRC Conference 2015, 2015
2014
A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer.
Proceedings of the Symposium on VLSI Circuits, 2014
Proceedings of the ESSCIRC 2014, 2014
2013
A 65-nm CMOS P-well/Deep N-well avalanche photodetector for integrated 850-nm optical.
Proceedings of the IEEE 10th International Conference on ASIC, 2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013