Kazutaka Kasuga

According to our database, Kazutaka Kasuga authored at least 5 papers between 2009 and 2010.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2010

Modeling and Experimental Verification of Misalignment Tolerance in Inductive-Coupling Inter-Chip Link for Low-Power 3-D System Integration.

Kiichi Niitsu, Yoshinori Kohama, Yasufumi Sugimori, Kazutaka Kasuga, Kenichi Osada, Naohiko Irie, Hiroki Ishikuro, Tadahiro Kuroda

IEEE Trans. Very Large Scale Integr. Syst., 2010

3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link.

Makoto Saen, Kenichi Osada, Yasuyuki Okuma, Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda

IEEE J. Solid State Circuits, 2010

An 8Tb/s 1pJ/b 0.8mm²/Tb/s QDR inductive-coupling interface between 65nm CMOS GPU and 0.1µm DRAM.

Noriyuki Miura, Kazutaka Kasuga, Mitsuko Saito, Tadahiro Kuroda

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2009

An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM.

Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Makoto Saen, Shigenobu Komatsu, Kenichi Osada, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link.

Shotaro Saito, Yoshinori Kohama, Yasufumi Sugimori, Yohei Hasegawa, Hiroki Matsutani, Toru Sano, Kazutaka Kasuga, Yoichi Yoshida, Kiichi Niitsu, Noriyuki Miura, Tadahiro Kuroda, Hideharu Amano

Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009