Ivan Beretta

According to our database1, Ivan Beretta authored at least 21 papers between 2009 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2016
Parallelizing the Chambolle Algorithm for Performance-Optimized Mapping on FPGA Devices.
ACM Trans. Embed. Comput. Syst., 2016

Efficient Hardware Design of Iterative Stencil Loops.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2015
PushPush: Seamless integration of hardware and software objects via function calls over AXI.
Proceedings of the 25th International Conference on Field Programmable Logic and Applications, 2015

2014
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms.
ACM Trans. Reconfigurable Technol. Syst., 2014

Early Classification of Pathological Heartbeats on Wireless Body Sensor Nodes.
Sensors, 2014

A Wireless Body Sensor Network for Activity Monitoring with Low Transmission Overhead.
Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, 2014

Hardware/software approach for code synchronization in low-power multi-core sensor nodes.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013
Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms.
IEEE Des. Test, 2013

A high-level synthesis flow for the implementation of iterative stencil loop algorithms on FPGA devices.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012
Model-based design for wireless body sensor network nodes.
Proceedings of the 13th Latin American Test Workshop, 2012

Tacit Consent: A Technique to Reduce Redundant Transmissions from Spatially Correlated Nodes in Wireless Sensor Networks.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Design exploration of energy-performance trade-offs for wireless sensor networks.
Proceedings of the 49th Annual Design Automation Conference 2012, 2012

Knowledge-based design space exploration of wireless sensor networks.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

B<sup>2</sup>IRS: A Technique to Reduce BAN-BAN Interferences in Wireless Sensor Networks.
Proceedings of the 2012 Ninth International Conference on Wearable and Implantable Body Sensor Networks, 2012

2011
A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Island-Based Adaptable Embedded System Design.
IEEE Embed. Syst. Lett., 2011

A Hybrid Mapping-Scheduling Technique for Dynamically Reconfigurable Hardware.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

A high-performance parallel implementation of the Chambolle algorithm.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Run-time mapping of applications on FPGA-based reconfigurable systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Operating system runtime management of partially dynamically reconfigurable embedded systems.
Proceedings of the 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia, 2010

2009
On-line task management for a reconfigurable cryptographic architecture.
Proceedings of the 23rd IEEE International Symposium on Parallel and Distributed Processing, 2009


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