Jaehyuk Huh

Orcid: 0000-0002-1742-047X

Affiliations:

KAIST, Korea

According to our database¹, Jaehyuk Huh authored at least 79 papers between 2001 and 2024.

Collaborative distances:

Dijkstra number² of three.
Erdős number³ of four.

Timeline

Legend:

Book

In proceedings

Article

PhD thesis

Dataset

Other

Bibliography

2024

Hardware-hardened Sandbox Enclaves for Trusted Serverless Computing.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., March, 2024

Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

2023

Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training.

[BibT_eX]

[DOI]

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

mNPUsim: Evaluating the Effect of Sharing Resources in Multi-core NPUs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2022

Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing.

[BibT_eX]

[DOI]

Proceedings of the 2022 USENIX Annual Technical Conference, 2022

Tunable Memory Protection for Secure Neural Processing Units.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

Supporting Dynamic Translation Granularity for Hybrid Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the IEEE 40th International Conference on Computer Design, 2022

TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

ZeroKernel: Secure Context-Isolated Execution on Commodity GPUs.

[BibT_eX]

[DOI]

IEEE Trans. Dependable Secur. Comput., 2021

SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2021

Multi-model Machine Learning Inference Serving with GPU Spatial Partitioning.

[BibT_eX]

[DOI]

CoRR, 2021

Stockade: Hardware Hardening for Distributed Trusted Sandboxes.

[BibT_eX]

[DOI]

CoRR, 2021

Hardware-assisted Trusted Memory Disaggregation for Secure Far Memory.

[BibT_eX]

[DOI]

CoRR, 2021

Ghost Routing to Enable Oblivious Computation on Memory-centric Networks.

[BibT_eX]

[DOI]

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Common Counters: Compressed Encryption Counters for Secure GPU Memory.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on Parallel Architectures and Compilation Techniques, 2021

2020

Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2020

Nested Enclave: Supporting Fine-grained Hierarchical Isolation with SGX.

[BibT_eX]

[DOI]

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Perforated Page: Supporting Fragmented Memory Allocation for Large Pages.

[BibT_eX]

[DOI]

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Charge-Aware DRAM Refresh Reduction with Value Transformation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Decoupled Address Translation for Heterogeneous Memory Systems.

[BibT_eX]

[DOI]

Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020

2019

GVTS: Global Virtual Time Fair Scheduling to Support Strict Fairness on Many Cores.

[BibT_eX]

[DOI]

Changdae Kim

Seungbeom Choi

Jaehyuk Huh

IEEE Trans. Parallel Distributed Syst., 2019

Disaggregated Cloud Memory with Elastic Block Management.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2019

Morphable DRAM Cache Design for Hybrid Memory Systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2019

ShieldStore: Shielded In-memory Key-value Storage with SGX.

[BibT_eX]

[DOI]

Proceedings of the Fourteenth EuroSys Conference 2019, Dresden, Germany, March 25-28, 2019, 2019

Heterogeneous Isolated Execution for Commodity GPUs.

[BibT_eX]

[DOI]

Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018

Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems.

[BibT_eX]

[DOI]

Changdae Kim

Jaehyuk Huh

IEEE Trans. Computers, 2018

Zebra Refresh: Value Transformation for Zero-Aware DRAM Refresh Reduction.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2018

Efficient Hardware-Assisted Logging with Asynchronous and Direct-Update for Persistent Memory.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Accelerating critical OS services in virtualized systems with flexible micro-sliced cores.

[BibT_eX]

[DOI]

Proceedings of the Thirteenth EuroSys Conference, 2018

Secure In-memory Key-Value Storage with SGX.

[BibT_eX]

[DOI]

Proceedings of the ACM Symposium on Cloud Computing, 2018

VIP: Virtual Performance-State for Efficient Power Management of Virtual Machines.

[BibT_eX]

[DOI]

Proceedings of the ACM Symposium on Cloud Computing, 2018

2017

Configuration Guidance Framework for Molecular Dynamics Simulations in Virtualized Clusters.

[BibT_eX]

[DOI]

IEEE Trans. Serv. Comput., 2017

Hybrid TLB Coalescing: Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations.

[BibT_eX]

[DOI]

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

Janus: supporting heterogeneous power management in virtualized environments.

[BibT_eX]

[DOI]

Proceedings of the 2017 Symposium on Cloud Computing, SoCC 2017, Santa Clara, CA, USA, 2017

Transparent Dual Memory Compression Architecture.

[BibT_eX]

[DOI]

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016

A Trusted IaaS Environment with Hardware Security Module.

[BibT_eX]

[DOI]

IEEE Trans. Serv. Comput., 2016

Virtual Snooping Coherence for Multi-Core Virtualized Systems.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2016

Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors.

[BibT_eX]

[DOI]

Junghoon Lee

Taehoon Kim

Jaehyuk Huh

IEEE Trans. Computers, 2016

Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching.

[BibT_eX]

[DOI]

Chang Hyun Park

Taekyung Heo

Jaehyuk Huh

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Fairness-oriented OS Scheduling Support for Multicore Systems.

[BibT_eX]

[DOI]

Changdae Kim

Jaehyuk Huh

Proceedings of the 2016 International Conference on Supercomputing, 2016

Blind: Power saving color transform method for OLED displays.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2016

Dynamic prefetcher reconfiguration for diverse memory architectures.

[BibT_eX]

[DOI]

Junghoon Lee

Taehoon Kim

Jaehyuk Huh

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Interference Management for Distributed Parallel Applications in Consolidated Clusters.

[BibT_eX]

[DOI]

Proceedings of the Twenty-First International Conference on Architectural Support for Programming Languages and Operating Systems, 2016

2015

H-SVM: Hardware-Assisted Secure Virtual Machines under a Vulnerable Hypervisor.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2015

Fast Two-Level Address Translation for Virtualized Systems.

[BibT_eX]

[DOI]

Jeongseob Ahn

Seongwook Jin

Jaehyuk Huh

IEEE Trans. Computers, 2015

Hardware-Assisted Secure Resource Accounting under a Vulnerable Hypervisor.

[BibT_eX]

[DOI]

Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, 2015

vCache: architectural support for transparent and isolated virtual LLCs in virtualized environments.

[BibT_eX]

[DOI]

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Big or Little: A Study of Mobile Interactive Applications on an Asymmetric Multi-core Platform.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

HePA: Hexagonal Platform Architecture for Smart Home Things.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE International Conference on Parallel and Distributed Systems, 2015

2014

Mutually Aware Prefetcher and On-Chip Network Designs for Multi-Cores.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2014

vCache: Providing a Transparent View of the LLC in Virtualized Environments.

[BibT_eX]

[DOI]

Daehoon Kim

Hwanju Kim

Jaehyuk Huh

IEEE Comput. Archit. Lett., 2014

Micro-Sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems.

[BibT_eX]

[DOI]

Jeongseob Ahn

Chang Hyun Park

Jaehyuk Huh

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Author retrospective for a NUCA substrate for flexible CMP cache sharing.

[BibT_eX]

[DOI]

Proceedings of the ACM International Conference on Supercomputing 25th Anniversary Volume, 2014

2013

Revisiting Shared Cache Contention Problems: A Practical Hardware-Software Cooperative Approach.

[BibT_eX]

[DOI]

IEICE Trans. Inf. Syst., 2013

2012

Parameter-Aware I/O Management for Solid State Disks (SSDs).

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2012

Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2012

Revisiting hardware-assisted page walks for virtualized systems.

[BibT_eX]

[DOI]

Jeongseob Ahn

Seongwook Jin

Jaehyuk Huh

Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

Locality-aware dynamic VM reconfiguration on MapReduce clouds.

[BibT_eX]

[DOI]

Proceedings of the 21st International Symposium on High-Performance Parallel and Distributed Computing, 2012

Dynamic Virtual Machine Scheduling in Clouds for Architectural Shared Resources.

[BibT_eX]

[DOI]

Proceedings of the 4th USENIX Workshop on Hot Topics in Cloud Computing, 2012

2011

Sector log: fine-grained storage management for solid state drives.

[BibT_eX]

[DOI]

Proceedings of the 2011 ACM Symposium on Applied Computing (SAC), TaiChung, Taiwan, March 21, 2011

Architectural support for secure virtualization under a vulnerable hypervisor.

[BibT_eX]

[DOI]

Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

Virtualizing performance asymmetric multi-core systems.

[BibT_eX]

[DOI]

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

Secure MMU: Architectural support for memory isolation among virtual machines.

[BibT_eX]

[DOI]

Seongwook Jin

Jaehyuk Huh

Proceedings of the IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2011), 2011

Exploiting Mutual Awareness between Prefetchers and On-chip Networks in Multi-cores.

[BibT_eX]

[DOI]

Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010

On-Chip Network Evaluation Framework.

[BibT_eX]

[DOI]

Proceedings of the Conference on High Performance Computing Networking, 2010

Virtual Snooping: Filtering Snoops in Virtualized Multi-cores.

[BibT_eX]

[DOI]

Daehoon Kim

Hwanju Kim

Jaehyuk Huh

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

The Effect of Multi-core on HPC Applications in Virtualized Systems.

[BibT_eX]

[DOI]

Proceedings of the Euro-Par 2010 Parallel Processing Workshops, 2010

Subspace snooping: filtering snoops with operating system support.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

HPCCD: Hybrid Parallel Continuous Collision Detection using CPUs and GPUs.

[BibT_eX]

[DOI]

Comput. Graph. Forum, 2009

A methodology for extracting performance parameters in solid state disks (SSDs).

[BibT_eX]

[DOI]

Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

2008

Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency.

[BibT_eX]

[DOI]

Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), 2008

2007

A NUCA Substrate for Flexible CMP Cache Sharing.

[BibT_eX]

[DOI]

IEEE Trans. Parallel Distributed Syst., 2007

2004

TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP.

[BibT_eX]

[DOI]

Karthikeyan Sankaralingam

ACM Trans. Archit. Code Optim., 2004

Speculative Incoherent Cache Protocols.

[BibT_eX]

[DOI]

IEEE Micro, 2004

Coherence decoupling: making use of incoherence.

[BibT_eX]

[DOI]

Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004

2003

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture.

[BibT_eX]

[DOI]

Karthikeyan Sankaralingam

IEEE Micro, 2003

2001

Exploring the Design Space of Future CMPs.

[BibT_eX]

[DOI]

Jaehyuk Huh

Doug Burger

Stephen W. Keckler

Proceedings of the 2001 International Conference on Parallel Architectures and Compilation Techniques (PACT 2001), 2001

Jaehyuk Huh

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