Jingchang Bian

According to our database, Jingchang Bian authored at least 9 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Reliability analysis and comparison of ring-PUF based on probabilistic models.

Jingchang Bian, Zhengfeng Huang, Yankun Lin, Zhao Yang, Huaguo Liang, Tianming Ni

Microelectron. J., February, 2024

A Compact TRNG Design for FPGA Based on the Metastability of RO-driven Shift Registers.

Qingsong Peng, Jingchang Bian, Zhengfeng Huang, Senling Wang, Aibin Yan

ACM Trans. Design Autom. Electr. Syst., January, 2024

A Reliability-Aware Splitting Duty-Cycle Physical Unclonable Function Based on Trade-off Process, Voltage, and Temperature Variations.

Jingchang Bian, Zhengfeng Huang, Peng Ye, Zhao Yang, Huaguo Liang

ACM Trans. Design Autom. Electr. Syst., January, 2024

Design Guidelines and Feedback Structure of Ring Oscillator PUF for Performance Improvement.

Zhengfeng Huang, Jingchang Bian, Yankun Lin, Huaguo Liang, Tianming Ni

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., January, 2024

2023

Design of True Random Number Generator Based on Multi-Ring Convergence Oscillator Using Short Pulse Enhanced Randomness.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Senling Wang, Xiaoqing Wen

IEEE Trans. Circuits Syst. I Regul. Pap., December, 2023

2022

Broadcast-TDMA: A Cost-Effective Fault-Tolerance Method for TSV Lifetime Reliability Enhancement.

Tianming Ni, Jingchang Bian, Zhao Yang, Mu Nie, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

IEEE Des. Test, 2022

MRCO: A Multi-ring Convergence Oscillator-based High-Efficiency True Random Number Generator.

Tianming Ni, Qingsong Peng, Jingchang Bian, Liang Yao, Zhengfeng Huang, Aibin Yan, Xiaoqing Wen

Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2022

2019

A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs.

Maoxiang Yi, Jingchang Bian, Tianming Ni, Cuiyun Jiang, Hao Chang, Huaguo Liang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2017

Vernier ring based pre-bond through silicon vias test in 3D ICs.

Tianming Ni, Mu Nie, Huaguo Liang, Jingchang Bian, Xiumin Xu, Xiangsheng Fang, Zhengfeng Huang, Xiaoqing Wen

IEICE Electron. Express, 2017