Joel Damiens
According to our database1,
Joel Damiens authored at least 6 papers
between 2013 and 2025.
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Bibliography
2025
A Programmable, Negative, and Dynamically Biased Sampler for Ultra-Low Power Body-Bias Generators in 18nm FD-SOI.
Proceedings of the 40th Conference on Design of Circuits and Integrated Systems, 2025
2016
Clock generator behavioral modeling for supply voltage glitch attack effects analysis.
Microprocess. Microsystems, 2016
2014
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the 9th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2014
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014
2013
Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology.
Proceedings of the International Symposium on Quality Electronic Design, 2013