Jorge Albericio

According to our database, Jorge Albericio authored at least 25 papers between 2012 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Guest Editorial: IEEE TC Special Issue: Hardware Acceleration of Machine Learning.

Michael Ferdman, Jorge Albericio, Tushar Krishna, Peter A. Milder

IEEE Trans. Computers, 2022

2020

TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training and Inference.

Mostafa Mahmoud, Isak Edo Vivancos, Ali Hadi Zadeh, Omar Mohamed Awad, Gennady Pekhimenko, Jorge Albericio, Andreas Moshovos

CoRR, 2020

TensorDash: Exploiting Sparsity to Accelerate Deep Neural Network Training.

Mostafa Mahmoud, Isak Edo, Ali Hadi Zadeh, Omar Mohamed Awad, Gennady Pekhimenko, Jorge Albericio, Andreas Moshovos

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

2019

Accelerating Image-Sensor-Based Deep Learning Applications.

Mostafa Mahmoud, Dylan Malone Stuart, Zissis Poulos, Alberto Delmas Lascorz, Patrick Judd, Sayeh Sharify, Milos Nikolic, Kevin Siu, Isak Edo Vivancos, Jorge Albericio, Andreas Moshovos

IEEE Micro, 2019

2018

Proteus: Exploiting precision variability in deep neural networks.

Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos

Parallel Comput., 2018

Value-Based Deep-Learning Acceleration.

Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger

IEEE Micro, 2018

Exploiting Typical Values to Accelerate Deep Learning.

Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas Lascorz, Sayeh Sharify, Zissis Poulos, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger

Computer, 2018

Identifying and Exploiting Ineffectual Computations to Enable Hardware Acceleration of Deep Learning.

Andreas Moshovos, Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Mostafa Mahmoud, Tayler H. Hetherington, Milos Nikolic, Dylan Malone Stuart, Kevin Siu, Zissis Poulos, Tor M. Aamodt, Natalie D. Enright Jerger

Proceedings of the 16th IEEE International New Circuits and Systems Conference, 2018

2017

Stripes: Bit-Serial Deep Neural Network Computing.

Patrick Judd, Jorge Albericio, Andreas Moshovos

IEEE Comput. Archit. Lett., 2017

Bit-pragmatic deep neural network computing.

Jorge Albericio, Alberto Delmas, Patrick Judd, Sayeh Sharify, Gerard O'Leary, Roman Genov, Andreas Moshovos

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Bit-Pragmatic Deep Neural Network Computing.

Jorge Albericio, Patrick Judd, Alberto Delmas, Sayeh Sharify, Andreas Moshovos

Proceedings of the 5th International Conference on Learning Representations, 2017

2016

Practical Multidimensional Branch Prediction.

André Seznec, Joshua San Miguel, Jorge Albericio

IEEE Micro, 2016

The Bunker Cache for spatio-value approximation.

Joshua San Miguel, Jorge Albericio, Natalie D. Enright Jerger, Aamer Jaleel

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Stripes: Bit-serial deep neural network computing.

Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Andreas Moshovos

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing.

Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks.

Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos

Proceedings of the 2016 International Conference on Supercomputing, 2016

2015

Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets.

Patrick Judd, Jorge Albericio, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Raquel Urtasun, Andreas Moshovos

CoRR, 2015

The inner most loop iteration counter: a new dimension in branch history.

André Seznec, Joshua San Miguel, Jorge Albericio

Proceedings of the 48th International Symposium on Microarchitecture, 2015

Doppelgänger: a cache for approximate computing.

Joshua San Miguel, Jorge Albericio, Andreas Moshovos, Natalie D. Enright Jerger

Proceedings of the 48th International Symposium on Microarchitecture, 2015

2014

Evaluating the memory system behavior of smartphone workloads.

Goran Narancic, Patrick Judd, Di Wu, Islam Atta, Michel Elnacouzi, Jason Zebchuk, Jorge Albericio, Natalie D. Enright Jerger, Andreas Moshovos, Kyros Kutulakos, Serag Gadelrab

Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Wormhole: Wisely Predicting Multidimensional Branches.

Jorge Albericio, Joshua San Miguel, Natalie D. Enright Jerger, Andreas Moshovos

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

2013

Exploiting reuse locality on inclusive shared last-level caches.

Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José María Llabería

ACM Trans. Archit. Code Optim., 2013

The reuse cache: downsizing the shared last-level cache.

Jorge Albericio, Pablo Ibáñez, Víctor Viñals, José M. Llabería

Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture, 2013

Characterization and cost-efficient selection of NoC topologies for general purpose CMPs.

Marta Ortín, Alexandra Ferreron, Jorge Albericio, Darío Suárez Gracia, María Villarroya-Gaudó, Cruz Izu, Víctor Viñals

Proceedings of the 2013 Interconnection Network Architecture: On-Chip, Multi-Chip, 2013

2012

ABS: A low-cost adaptive controller for prefetching in a banked shared last-level cache.

Jorge Albericio, Ruben Gran Tejero, Pablo Ibáñez, Víctor Viñals, José María Llabería

ACM Trans. Archit. Code Optim., 2012