Marco Mattavelli

According to our database1, Marco Mattavelli authored at least 154 papers between 1994 and 2019.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
A CMOS Analog Front-End for Implantable Pulmonary Artery Pressure Monitoring System.
Proceedings of the 15th Conference on Ph.D. Research in Microelectronics and Electronics, 2019

Composite Data Types in Dynamic Dataflow Languages as Copyless Memory Sharing Mechanism.
Proceedings of the Computational Science - ICCS 2019, 2019

An Heterogeneous Compiler of Dataflow Programs for Zynq Platforms.
Proceedings of the IEEE International Conference on Acoustics, 2019

Low-Cost Readout Electronics for Piezoresistive MEMS-Based Transducers.
Proceedings of the IEEE International Instrumentation and Measurement Technology Conference, 2019

2018
High-Precision Performance Estimation for the Design Space Exploration of Dynamic Dataflow Programs.
IEEE Trans. Multi-Scale Computing Systems, 2018

Execution Trace Graph of Dataflow Process Networks.
IEEE Trans. Multi-Scale Computing Systems, 2018

Efficient Dynamic Optimisation Heuristics for Dataflow Pipelines.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

Shared-variable Synchronization Approaches for Dynamic Data Flow Programs.
Proceedings of the 2018 IEEE International Workshop on Signal Processing Systems, 2018

Lossy Compression of Quality Scores in Differential Gene Expression: A First Assessment and Impact Analysis.
Proceedings of the 2018 Data Compression Conference, 2018

2017
On the Development and Optimization of HEVC Video Decoders Using High-Level Dataflow Modeling.
Signal Processing Systems, 2017

Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2017

Design space exploration of dataflow-based Smith-Waterman FPGA implementations.
Proceedings of the 2017 IEEE International Workshop on Signal Processing Systems, 2017

High level synthesis of Smith-Waterman dataflow implementations.
Proceedings of the 2017 IEEE International Conference on Acoustics, 2017

Buffer dimensioning for throughput improvement of dynamic dataflow signal processing applications on multi-core platforms.
Proceedings of the 25th European Signal Processing Conference, 2017

Differential Gene Expression with Lossy Compression of Quality Scores in RNA-Seq Data.
Proceedings of the 2017 Data Compression Conference, 2017

Profiling of dynamic dataflow programs on MPSoC multi-core architectures.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

Execution trace graph based interface synthesis of signal processing dataflow programs for heterogeneous MPSoCs.
Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

2016
Automated Design Flow for Multi-Functional Dataflow-Based Platforms.
Signal Processing Systems, 2016

Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques - Two Examples of Bounded Buffer Scheduling: Deadlock Avoidance and Deadlock Recovery Strategies.
Signal Processing Systems, 2016

Performance Estimation Based Multicriteria Partitioning Approach for Dynamic Dataflow Programs.
J. Electrical and Computer Engineering, 2016

High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Performance estimation of program partitions on multi-core platforms.
Proceedings of the 26th International Workshop on Power and Timing Modeling, 2016

Design Space Exploration Problem Formulation for Dataflow Programs on Heterogeneous Architectures.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

High-Precision Performance Estimation of Dynamic Dataflow Programs.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Programming Models and Methods for Heterogeneous Parallel Embedded Systems.
Proceedings of the 10th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2016

Tabu Search for Partitioning Dynamic Dataflow Programs.
Proceedings of the International Conference on Computational Science 2016, 2016

A Partition Scheduler Model for Dynamic Dataflow Programs.
Proceedings of the International Conference on Computational Science 2016, 2016

An Evaluation Framework for Lossy Compression of Genome Sequencing Quality Values.
Proceedings of the 2016 Data Compression Conference, 2016

Trace-based manycore partitioning of stream-processing applications.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

High-level system synthesis and optimization of dataflow programs for MPSoCs.
Proceedings of the 50th Asilomar Conference on Signals, Systems and Computers, 2016

2015
Actor Merging for Dataflow Process Networks.
IEEE Trans. Signal Processing, 2015

Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2015

A Methodology for Profiling and Partitioning Stream Programs on Many-core Architectures.
Proceedings of the International Conference on Computational Science, 2015

Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs.
Proceedings of the International Conference on Computational Science, 2015

2014
High-level dataflow design of signal processing systems for reconfigurable and multicore heterogeneous platforms.
J. Real-Time Image Processing, 2014

Dataflow programs analysis and optimization using model predictive control techniques: An example of bounded buffer scheduling.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Characterizing communication behavior of dataflow programs using trace analysis.
Proceedings of the XIVth International Conference on Embedded Computer Systems: Architectures, 2014

Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014

A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations.
Proceedings of the IEEE International Conference on Acoustics, 2014

TURNUS: An open-source design space exploration framework for dynamic stream programs.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Execution trace graph analysis of dataflow programs: Bounded buffer scheduling and deadlock recovery using model predictive control.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Development and optimization of high level dataflow programs: The HEVC decoder design case.
Proceedings of the 48th Asilomar Conference on Signals, Systems and Computers, 2014

2013
Special issue on MPEG CCF.
Sig. Proc.: Image Comm., 2013

Reconfigurable media coding: An overview.
Sig. Proc.: Image Comm., 2013

Methods to explore design space for MPEG RMC codec specifications.
Sig. Proc.: Image Comm., 2013

Secure computing with the MPEG RVC framework.
Sig. Proc.: Image Comm., 2013

Partitioning and optimization of high level stream applications for multi clock domain architectures.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2013

Automated QoE evaluation of Dynamic Adaptive Streaming over HTTP.
Proceedings of the Fourth International Workshop on Quality of Multimedia Experience, 2013

Buffer optimization based on critical path analysis of a dataflow program design.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

TURNUS: A design exploration framework for dataflow system design.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Live demonstration: High level software and hardware synthesis of dataflow programs.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Design space exploration of high level stream programs on parallel architectures: A focus on the buffer size minimization and optimization problem.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

High-level synthesis of dataflow programs for signal processing systems.
Proceedings of the 8th International Symposium on Image and Signal Processing and Analysis, 2013

Performance benchmarking of RVC based multimedia specifications.
Proceedings of the IEEE International Conference on Image Processing, 2013

Static and quasi-static compositions of stream processing applications from dynamic dataflow programs.
Proceedings of the IEEE International Conference on Acoustics, 2013

Dataflow program analysis and refactoring techniques for design space exploration: MPEG-4 AVC/H.264 decoder implementation case study.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Modeling control tokens for composition of CAL actors.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Design space exploration and implementation of RVC-CAL applications using the TURNUS framework.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Turnus: A unified dataflow design space exploration framework for heterogeneous parallel systems.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Representing Guard Dependencies in Dataflow Execution Traces.
Proceedings of the Fifth International Conference on Computational Intelligence, 2013

Systems design space exploration by serial dataflow program execution.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications.
Proceedings of the 2013 Asilomar Conference on Signals, 2013

2012
Hardware and Software Synthesis of Heterogeneous Systems from Dataflow Programs.
J. Electrical and Computer Engineering, 2012

Profiling of Dataflow Programs Using Post Mortem Causation Traces.
Proceedings of the 2012 IEEE Workshop on Signal Processing Systems, 2012

Scheduling of dynamic dataflow programs based on state space analysis.
Proceedings of the 2012 IEEE International Conference on Acoustics, 2012

Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

2011
Guest Editorial: Special Issue on Reconfigurable Video Coding.
Signal Processing Systems, 2011

Automatic Synthesis of Parsers and Validation of Bitstreams Within the MPEG Reconfigurable Video Coding Framework.
Signal Processing Systems, 2011

Quasi-Static Scheduling of CAL Actor Networks for Reconfigurable Video Coding.
Signal Processing Systems, 2011

Overview of the MPEG Reconfigurable Video Coding Framework.
Signal Processing Systems, 2011

CAL Dataflow Components for an MPEG RVC AVC Baseline Encoder.
Signal Processing Systems, 2011

Pipeline synthesis and optimization of FPGA-based video processing applications with CAL.
EURASIP J. Image and Video Processing, 2011

Methodology for the hardware/software co-design of dataflow programs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Optimization of portable parallel signal processing applications by design space exploration of dataflow programs.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Scheduling of dynamic dataflow programs with model checking.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Methodology and technique to improve throughput of FPGA-based Cal dataflow programs: Case study of the RVC MPEG-4 SP Intra decoder.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

Hardware/software co-design of dataflow programs for reconfigurable hardware and multi-core platforms.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Optimization methodologies for complex FPGA-based signal processing systems with CAL.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

A unified hardware/software co-synthesis solution for signal processing systems.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

2010
The Reconfigurable Video Coding Standard [Standards in a Nutshell].
IEEE Signal Process. Mag., 2010

An adaptive system for real-time scalable video streaming with end-to-end QOS control.
Proceedings of the 11th International Workshop on Image Analysis for Multimedia Interactive Services, 2010

Reconfigurable video coding: a stream programming approach to the specification of new video coding standards.
Proceedings of the First Annual ACM SIGMM Conference on Multimedia Systems, 2010

RVC: A multi-decoder CAL Composer tool.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

RVC-CAL dataflow implementations of MPEG AVC/H.264 CABAC decoding.
Proceedings of the 2010 Conference on Design & Architectures for Signal & Image Processing, 2010

MPEG Reconfigurable Video Coding.
Proceedings of the Handbook of Signal Processing Systems, 2010

2009
Special Issue: Algorithm/Architecture Co-Exploration of Visual Computing on Emerging Platforms.
IEEE Trans. Circuits Syst. Video Techn., 2009

A Computationally Efficient Method for Polyphonic Pitch Estimation.
EURASIP J. Adv. Sig. Proc., 2009

An Integrated Environment for HW/SW Co-design based on a CAL Specification and HW/SW Code Generators.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A Hybrid Decoder Configuration of MPEG-4 and AVS in Reconfigurable Video Coding Framework.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

Reconfigurable video coding: Objectives and technologies.
Proceedings of the International Conference on Image Processing, 2009

2008
Music Onset Detection Based on Resonator Time Frequency Image.
IEEE Trans. Audio, Speech & Language Processing, 2008

OpenDF: a dataflow toolset for reconfigurable hardware and multicore systems.
SIGARCH Computer Architecture News, 2008

Smart Camera Based on Embedded HW/SW Coprocessor.
EURASIP J. Emb. Sys., 2008

A Platform for the Development and the Validation of HW IP Components Starting from Reference Software Specifications.
EURASIP J. Emb. Sys., 2008

A Multimedia Terminal Supporting Adaptation for QoS Control.
Proceedings of the Ninth International Workshop on Image Analysis for Multimedia Interactive Services, 2008

Validation of bitstream syntax and synthesis of parsers in the MPEG Reconfigurable Video Coding framework.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Efficient data flow variable length decoding implementation for the MPEG reconfigurable video coding framework.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Video decoder reconfigurations and AVS extensions in the new MPEG reconfigurable video coding framework.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Scheduling of dataflow models within the Reconfigurable Video Coding framework.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

A multimedia terminal for adaptation and End-to-End QoS control.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

A co-design platform for algorithm/architecture design exploration.
Proceedings of the 2008 IEEE International Conference on Multimedia and Expo, 2008

Multimedia terminal architecture: An inter-operable approach.
Proceedings of the 6th ACS/IEEE International Conference on Computer Systems and Applications, 2008

2007
A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach.
Journal of Circuits, Systems, and Computers, 2007

Embedded Systems for Portable and Mobile Video Platforms.
EURASIP J. Emb. Sys., 2007

Reconfigurable Media Coding: Self-Describing Multimedia Bitstreams.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

Reconfigurable Media Coding: A New Specification Model for Multimedia Coders.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2007

A Platform for Mixed HW/SW Algorithm Specifications for the Exploration of SW and HW Partitioning.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

A new time-frequency representation for music signal analysis: Resonator time-frequency image.
Proceedings of the 9th International Symposium on Signal Processing and Its Applications, 2007

2006
SMIL to MPEG-4 BIFS Conversion.
Proceedings of the Second International Conference on Automated Production of Cross Media Content for Multi-Channel Distribution, 2006

2005
High-Abstraction Level Complexity Analysis and Memory Architecture Simulations of Multimedia Algorithms.
IEEE Trans. Circuits Syst. Video Techn., 2005

Evaluation of the Parallelization Potential for Efficient Multimedia Implementations: Dynamic Evaluation of Algorithm Critical Path.
IEEE Trans. Circuits Syst. Video Techn., 2005

Introduction to the Special Issue on Integrated Multimedia Platforms.
IEEE Trans. Circuits Syst. Video Techn., 2005

A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

High Level Extraction of SoC Architectural Information from Generic C Algorithmic Descriptions.
Proceedings of the 5th IEEE International Workshop on System-on-Chip for Real-Time Applications (IWSOC 2005), 2005

A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs.
Proceedings of the 2005 IEEE International Conference on Multimedia and Expo, 2005

Configurable motion-estimation hardware accelerator module for the MPEG-4 reference hardware description platform.
Proceedings of the 2005 International Conference on Image Processing, 2005

2003
High-level algorithmic complexity evaluation for system design.
Journal of Systems Architecture, 2003

Intellectual property management and protection for MPEG multimedia content: A structured language for interoperable IPMP systems.
Int. J. Imaging Systems and Technology, 2003

High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder.
Proceedings of the Integrated Circuit and System Design, 2003

Data Dependences Critical Path Evaluation at C/C++ System Level Description.
Proceedings of the Integrated Circuit and System Design, 2003

Embedded co-processor architecture for CMOS based image acquisition.
Proceedings of the 2003 International Conference on Image Processing, 2003

2002
A scalable and programmable architecture for 2-D DWT decoding.
IEEE Trans. Circuits Syst. Video Techn., 2002

The MIN PFS problem and piecewise linear model estimation.
Discrete Applied Mathematics, 2002

Techniques for Optimization of Net Algorithms.
Proceedings of the 2002 International Conference on Parallel Computing in Electrical Engineering (PARELEC 2002), 2002

An interpreted approach to multimedia streams protection.
Proceedings of the 11th European Signal Processing Conference, 2002

2001
Fast Line Detection Algorithms Based on Combinatorial Optimization.
Proceedings of the Visual Form 2001, 4th International Workshop on Visual Form, 2001

2000
Vector-tracing algorithms for motion estimation in large search windows.
IEEE Trans. Circuits Syst. Video Techn., 2000

A hardware oriented analysis of cryptographic systems for multimedia applications.
Proceedings of the 10th European Signal Processing Conference, 2000

Scheduling strategies for 2D wavelet coding implementations.
Proceedings of the 10th European Signal Processing Conference, 2000

A system-on-a-chip for multimedia stream processing and communication.
Proceedings of the 10th European Signal Processing Conference, 2000

1999
Postprocessing of images by filtering the unmasked coding noise.
IEEE Trans. Image Processing, 1999

Wavelet image compression for mobile/portable applications.
IEEE Trans. Consumer Electronics, 1999

An efficient host/co-processor solution for MPEG-4 audio composition.
IEEE Trans. Consumer Electronics, 1999

A New Approach for Fast Line Detection Based on Combinatorial Optimization.
Proceedings of the 1oth International Conference on Image Analysis and Processing (ICIAP 1999), 1999

1998
An Efficient Motion Estimation Algorithm based on Tracing Techniques on Large Search Windows.
Proceedings of the 1998 IEEE International Conference on Image Processing, 1998

An Efficient Line Detection Algorithm based on a New Combinatorial Optimization Formulation.
Proceedings of the 1998 IEEE International Conference on Image Processing, 1998

Vector tracing techniques for motion estimation algorithms in video coding.
Proceedings of the 9th European Signal Processing Conference, 1998

Prediction of decoding time for MPEG-4 video.
Proceedings of the 9th European Signal Processing Conference, 1998

Computational graceful degradation for video decoding.
Proceedings of the 9th European Signal Processing Conference, 1998

Real-Time Constraints and Prediction of Video Decoding Time for Multimedia Systems.
Proceedings of the Multimedia Applications, Services and Techniques, 1998

1997
Motion analysis and estimation: From ill-posed discrete inverse linear problems to MPEG-2 coding.
Signal Processing, 1997

A Parallel Multimedia Processor for Macroblock Based Compression Standards.
Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997

Computational Graceful Degradation for Video Sequence Decoding.
Proceedings of the Proceedings 1997 International Conference on Image Processing, 1997

A Perceptron-Based Approach to Piecewise Linear Modeling with an Application to Time Series.
Proceedings of the Artificial Neural Networks, 1997

1996
Overlapped motion compensation for subband coding of video sequences.
Sig. Proc.: Image Comm., 1996

Image restoration by 1-D Kalman filtering on oriented image decompositions.
Proceedings of the 1996 IEEE International Conference on Acoustics, 1996

Estimating piecewise linear models using combinatorial optimization techniques.
Proceedings of the 8th European Signal Processing Conference, 1996

1995
Post-processing of coded images by neural network cancellation of the unmasked noise.
Neural Processing Letters, 1995

Evaluation of a SPARC Board Equipped with the Ada Tasking Coprocessor (ATAC).
Proceedings of the Ada in Europe, Second International Eurospace, 1995

1994
Composite Source Modling Based on VQ and Arithmetic Coding for Digital Subband Video Compression.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994

Motion Estimation Relaxing the Constancy Brightness Constraint.
Proceedings of the Proceedings 1994 International Conference on Image Processing, 1994

Image visual quality restoration by cancellation of the unmasked noise.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994


  Loading...