Karthik Chandrasekar

According to our database, Karthik Chandrasekar authored at least 12 papers between 2007 and 2016.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2016

Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling.

Sven Goossens, Karthik Chandrasekar, Benny Akesson, Kees Goossens

IEEE Trans. Computers, 2016

2014

Exploiting expendable process-margins in DRAMs for run-time performance optimization.

Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

Virtual execution platforms for mixed-time-criticality systems: the CompSOC architecture and design flow.

Kees Goossens, Arnaldo Azevedo, Karthik Chandrasekar, Manil Dev Gomony, Sven Goossens, Martijn Koedam, Yonghui Li, Davit Mirzoyan, Anca Mariana Molnos, Ashkan Beyranvand Nejad, Andrew Nelson, Shubhendu Sinha

SIGBED Rev., 2013

TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration.

Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar

Proceedings of the 2013 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2013

System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs.

Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens

Proceedings of the Design, Automation and Test in Europe, 2013

Towards variation-aware system-level power estimation of DRAMs: an empirical approach.

Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2012

A Predictor-Based Power-Saving Policy for DRAM Memories.

Gervin Thomas, Karthik Chandrasekar, Benny Akesson, Ben H. H. Juurlink, Kees Goossens

Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Run-time power-down strategies for real-time SDRAM memory controllers.

Karthik Chandrasekar, Benny Akesson, Kees Goossens

Proceedings of the 49th Annual Design Automation Conference 2012, 2012

2011

Improved Power Modeling of DDR SDRAMs.

Karthik Chandrasekar, Benny Akesson, Kees Goossens

Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2008

On the concept of simultaneous execution of multiple applications on hierarchically based cluster and the silicon operating system.

Nagarajan Venkateswaran, Vinoth Krishnan Elangovan, Karthik Ganesan, T. R. S. Sagar, S. Aananthakrishanan, S. Ramalingam, Shyamsundar Gopalakrishnan, Madhavan Manivannan, Deepak Srinivasan, Viswanath Krishnamurthy, Karthik Chandrasekar, Viswanath Venkatesan, Balaji Subramaniam, V. Sangkar, Aravind Vasudevan, Shrikanth Ganapathy, Sriram Murali, M. Thyagarajan

Proceedings of the 22nd IEEE International Symposium on Parallel and Distributed Processing, 2008

Design for Testability of Functional Cores in High Performance Node Architectures.

Nagarajan Venkateswaran, Karthik Chandrasekar, Shrikanth Ganapathy

Proceedings of the 4th IEEE International Symposium on Electronic Design, 2008

2007

Future generation supercomputers I: a paradigm for node architecture.

Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan

SIGARCH Comput. Archit. News, 2007