Keigo Bunsen
Orcid: 0000-0002-0709-1780
According to our database1,
Keigo Bunsen
authored at least 12 papers
between 2010 and 2022.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2022
An Injection-Locked Ring-Oscillator-Based Fractional-N Digital PLL Supporting BLE Frequency Modulation.
IEEE J. Solid State Circuits, 2022
2021
A Redundancy-Based Background Calibration for Comparator Offset/Threshold and DAC Gain in a Ping-Pong SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
2019
A Self-Calibrated 16-GHz Subsampling-PLL-Based Fast-Chirp FMCW Modulator With 1.5-GHz Bandwidth.
IEEE J. Solid State Circuits, 2019
A Self-Calibrated 16GHz Subsampling-PLL-Based 30s Fast Chirp FMCW Modulator with 1.5GHz Bandwidth and 100kHz rms Error.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2013
Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry.
IEEE J. Solid State Circuits, 2013
2012
A 24 dB Gain 51-68 GHz Common Source Low Noise Amplifier Using Asymmetric-Layout Transistors.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2012
A full 4-channel 6.3Gb/s 60GHz direct-conversion transceiver with low-power analog and digital baseband circuitry.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012
2011
IEEE J. Solid State Circuits, 2011
Proceedings of the IEEE International Solid-State Circuits Conference, 2011
A 60GHz 16Gb/s 16QAM low-power direct-conversion transceiver using capacitive cross-coupling neutralization in 65 nm CMOS.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2011
2010
A De-Embedding Method Using Different-Length Transmission Lines for mm-Wave CMOS Device Modeling.
IEICE Trans. Electron., 2010
Proceedings of the 36th European Solid-State Circuits Conference, 2010