Koichiro Takayama

According to our database, Koichiro Takayama authored at least 12 papers between 1988 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2014

Software Defect Prediction for LSI Designs.

Matthieu Parizy, Koichiro Takayama, Yuji Kanazawa

Proceedings of the 30th IEEE International Conference on Software Maintenance and Evolution, Victoria, BC, Canada, September 29, 2014

2004

High level hardware validation using hierarchical message sequence charts.

Praveen K. Murthy, Sreeranga P. Rajan, Koichiro Takayama

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

2002

Efficient Combinational Verification Using Overlapping Local BDDs and a Hash Table.

Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Jacob A. Abraham, Donald S. Fussell, Masahiro Fujita

Formal Methods Syst. Des., 2002

Effective safety property checking using simulation-based sequential ATPG.

Shuo Sheng, Koichiro Takayama, Michael S. Hsiao

Proceedings of the 39th Design Automation Conference, 2002

2001

A retargetable VLIW compiler framework for DSPs withinstruction-level parallelism.

Subramanian Rajagopalan, Sreeranga P. Rajan, Sharad Malik, Sandro Rigo, Guido Araujo, Koichiro Takayama

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

A New Functional Test Program Generation Methodology.

Farzan Fallah, Koichiro Takayama

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

2000

Automatic partitioning for efficient combinatorial verification.

Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita

Proceedings of ASP-DAC 2000, 2000

1999

An efficient filter-based approach for combinational verification.

Rajarshi Mukherjee, Jawahar Jain, Koichiro Takayama, Masahiro Fujita, Jacob A. Abraham, Donald S. Fussell

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Model Checking Based on Sequential ATPG.

Vamsi Boppana, Sreeranga P. Rajan, Koichiro Takayama, Masahiro Fujita

Proceedings of the Computer Aided Verification, 11th International Conference, 1999

1998

An approach to verify a large scale system-on-a-chip using symbolic model checking.

Koichiro Takayama, Taizo Satoh, Tsuneo Nakata, Fumiyasu Hirose

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1990

A high-speed test-generation method using a test generation circuit.

Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato

Syst. Comput. Jpn., 1990

1988

A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator.

Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato

Proceedings of the Proceedings International Test Conference 1988, 1988