Maria Belen Pérez-Verdú
Orcid: 0000-0003-4783-4443Affiliations:
- University of Seville, Spain
According to our database1,
Maria Belen Pérez-Verdú
authored at least 34 papers
between 1987 and 2016.
Collaborative distances:
Collaborative distances:
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Bibliography
2016
Int. J. Circuit Theory Appl., 2016
2014
Form factor improvement of smart-pixels for vision sensors through 3-D vertically-integrated technologies.
Proceedings of the IEEE 5th Latin American Symposium on Circuits and Systems, 2014
2013
A hierarchical vision processing architecture oriented to 3D integration of smart camera chips.
J. Syst. Archit., 2013
2012
CMOS SPADs selection, modeling and characterization towards image sensors implementation.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012
2010
A 0.13 µm CMOS adaptive sigma-delta modulator for triple-mode GSM/Bluetooth/UMTS applications.
Microelectron. J., 2010
2009
Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey.
Microelectron. J., 2009
2006
Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006
2005
High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models.
IEEE Trans. Circuits Syst. I Regul. Pap., 2005
A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs.
IEEE J. Solid State Circuits, 2005
2004
IEEE Trans. Circuits Syst. I Regul. Pap., 2004
An optimization-based tool for the high-level synthesis of discrete-time and continuous-time ΣΔ modulators in the Matlab/Simulink environment.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
A 0.35µm CMOS 17-bit@40kS/s sensor A/D interface based on a programmable-gain cascade 2-1 Sigma Delta modulator.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
An alternative DFT methodology to test high-resolution Sigma Delta modulators.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004
MATLAB/SIMULINK-Based High-Level Synthesis of Discrete-Time and Continuous-Time [Sigma, Delta] Modulators.
Proceedings of the 2004 Design, 2004
2003
A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time Sigma-Delta modulators.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003
2002
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
2001
Analysis and experimental characterization of idle tones in 2nd-order bandpass Sigma-Delta modulators-a 0.8 um CMOS switched-current case study.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass Sigma-Delta modulators.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001
A High-performance sigma-delta ADC for ADSL applications in 0.35 μm CMOS digital technology.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001
Top-down design of a xDSL 14-bit 4MS/s sigma-delta modulator in digital CMOS technology.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
2000
A CMOS 0.8-μm transistor-only 1.63-MHz switched-current bandpass ΣΔ modulator for AM signal A/D conversion.
IEEE J. Solid State Circuits, 2000
Reliable analysis of settling errors in SC integrators-application to the design of high-speed ΣΔ modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
A 13-bit, 2.2-MS/s, 55-mW multibit cascade ΣΔ modulator in CMOS 0.7-μm single-poly technology.
IEEE J. Solid State Circuits, 1999
Non-ideal quantization noise shaping in switched-current bandpass Sigma-Delta modulators.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1998
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
Practical considerations for the design of cascade multi-bit high-frequency ΣΔ modulators.
Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems, 1998
1997
Using CAD tools for shortening the design cycle of high-performance sigma-delta modulators: A 16·4 bit, 9·6 kHz, 1·71 mW ΣΔM in CMOS 0·7 μm technology.
Int. J. Circuit Theory Appl., 1997
1995
IEEE J. Solid State Circuits, July, 1995
1994
Modeling OpAmp-Induced Harmonic Distorition for Switched-Capacitor Sigma-Delta Modulator Design.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994
1993
A Tool for Automated Design of Sigma-Delta Modulators Using Statistical Optimization.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993
1990
Int. J. Circuit Theory Appl., 1990
1987