Mark Hempstead

Proceedings of the IEEE International Symposium on Workload Characterization, 2023

2022

CASHT: Contention Analysis in Shared Hierarchies with Thefts.

[BibT_eX]

[DOI]

Maziar Amiraski

ACM Trans. Archit. Code Optim., 2022

PInTE: Probabilistic Induction of Theft Evictions.

[BibT_eX]

[DOI]

Xuesi Chen

Proceedings of the IEEE International Symposium on Workload Characterization, 2022

NVMExplorer: A Framework for Cross-Stack Comparisons of Embedded Non-Volatile Memories.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

Hercules: Heterogeneity-Aware Inference Serving for At-Scale Personalized Recommendation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022

2021

Thermal-Aware Overclocking for Smartphones.

[BibT_eX]

[DOI]

David Werner

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Understanding Capacity-Driven Scale-Out Neural Recommendation Inference.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

HotGauge: A Methodology for Characterizing Advanced Hotspots in Modern and Next Generation Processors.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Workload Characterization, 2021

2020

C^2AFE: Capacity Curve Annotation and Feature Extraction for Shared Cache Analysis.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing.

[BibT_eX]

[DOI]

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

Early-stage Automated Accelerator Identification Tool for Embedded Systems with Limited Area.

[BibT_eX]

[DOI]

Parnian Mokri

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

SnackNoC: Processing in the Communication Layer.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

The Architectural Implications of Facebook's DNN-Based Personalized Recommendation.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

Early-stage Automated Identification of Similar Hardware Implementations with Abstract-Syntax-Tree.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Early-stage Automated Identification Tool for Shared Accelerators.

[BibT_eX]

[DOI]

Parnian Mokri

Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

2019

Quantifying Process Variations and Its Impacts on Smartphones.

[BibT_eX]

[DOI]

Scott Haseley

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019

Evaluation of Non-Volatile Memory Based Last Level Cache Given Modern Use Case Behavior.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Workload Characterization, 2019

2018

SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2018

Towards Cross-Framework Workload Analysis via Flexible Event-Driven Interfaces.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018

Machine Learning on the Thermal Side-Channel: Analysis of Accelerator-Rich Architectures.

[BibT_eX]

[DOI]

Proceedings of the 36th IEEE International Conference on Computer Design, 2018

2017

Separated By Birth: Hidden Differences Between Seemingly-Identical Smartphone CPUs.

[BibT_eX]

[DOI]

Proceedings of the 18th International Workshop on Mobile Computing Systems and Applications, 2017

2016

Algorithms for CPU and DRAM DVFS under inefficiency constraints.

[BibT_eX]

[DOI]

Rizwana Begum

Proceedings of the 34th IEEE International Conference on Computer Design, 2016

2015

Epoch Profiles: Microarchitecture-Based Application Analysis and Optimization.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2015

Effects of Nondeterminism in Hardware and Software Simulation with Thread Mapping.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on VLSI Design, 2015

Can You Trust Your Memory Trace? A Comparison of Memory Traces from Binary Instrumentation and Simulation.

[BibT_eX]

[DOI]

Proceedings of the 28th International Conference on VLSI Design, 2015

Synchrotrace: synchronization-aware architecture-agnostic traces for light-weight multicore simulation.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Performance Analysis of Systems and Software, 2015

Energy-Performance Trade-offs on Energy-Constrained Devices with Multi-component DVFS.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Symposium on Workload Characterization, 2015

Combative cache efficacy techniques: Cache replacement in the context of independent prefetching in last level cache.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Power-agility metrics: Measuring dynamic characteristics of energy proportionality.

[BibT_eX]

[DOI]

Rizwana Begum

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Uncore RPD: Rapid Design Space Exploration of the Uncore via Regression Modeling.

[BibT_eX]

[DOI]

Karthik Sangaiah

Baris Taskin

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015

2014

Static thread mapping for NoCs via binary instrumentation traces.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

2013

Metrics for Early-Stage Modeling of Many-Accelerator Architectures.

[BibT_eX]

[DOI]

Siddharth Nilakantan

Steven J. Battle

IEEE Comput. Archit. Lett., 2013

Platform-independent analysis of function-level communication in workloads.

[BibT_eX]

[DOI]

Siddharth Nilakantan

Proceedings of the IEEE International Symposium on Workload Characterization, 2013

[BibT_eX]

[DOI]

Steven J. Battle

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Characterizing the costs and benefits of hardware parallelism in accelerator cores.

[BibT_eX]

[DOI]

Steven J. Battle

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

2012

The accelerator store: A shared memory framework for accelerator-based systems.

[BibT_eX]

[DOI]

ACM Trans. Archit. Code Optim., 2012

Flexible register management using reference counting.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

2011

An Accelerator-Based Wireless Sensor Network Processor in 130 nm CMOS.

[BibT_eX]

[DOI]

IEEE J. Emerg. Sel. Topics Circuits Syst., 2011

The Case for Power-Agile Computing.

[BibT_eX]

[DOI]

Proceedings of the 13th Workshop on Hot Topics in Operating Systems, 2011

Evaluation of an accelerator architecture for speckle reducing anisotropic diffusion.

[BibT_eX]

[DOI]

Proceedings of the 14th International Conference on Compilers, 2011

2010

The Accelerator Store framework for high-performance, low-power accelerator-based systems.

[BibT_eX]

[DOI]

IEEE Comput. Archit. Lett., 2010

2009

An accelerator-based wireless sensor network processor in 130nm CMOS.

[BibT_eX]

[DOI]

Proceedings of the 2009 International Conference on Compilers, 2009

2008

Survey of Hardware Systems for Wireless Sensor Networks.

[BibT_eX]

[DOI]

J. Low Power Electron., 2008

System design considerations for sensor network applications.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

2006

A Realistic Power Consumption Model for Wireless Sensor Network Devices.

[BibT_eX]

[DOI]

Qin Wang

Woodward Yang

Proceedings of the Third Annual IEEE Communications Society on Sensor and Ad Hoc Communications and Networks, 2006

Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations.

[BibT_eX]

[DOI]

Proceedings of the 2006 International Conference on Compilers, 2006

2005

Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices.

[BibT_eX]

[DOI]

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

An Ultra Low Power System Architecture for Sensor Network Applications.

[BibT_eX]

[DOI]

Proceedings of the 32st International Symposium on Computer Architecture (ISCA 2005), 2005

2004

Simulating the power consumption of large-scale sensor network applications.

[BibT_eX]

[DOI]

Victor Shnayder

Bor-rong Chen

Geoffrey Werner-Allen

Matt Welsh

Proceedings of the 2nd International Conference on Embedded Networked Sensor Systems, 2004

TinyBench: The Case For A Standardized Benchmark Suite for TinyOS Based Wireless Sensor Network Devices.

[BibT_eX]

[DOI]

Matt Welsh