Radhika Jagtap

According to our database1, Radhika Jagtap authored at least 8 papers between 2016 and 2020.

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Bibliography

2020
The gem5 Simulator: Version 20.0+.
CoRR, 2020

Mocktails: Capturing the Memory Behaviour of Proprietary Mobile Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2018
SynchroTrace: Synchronization-Aware Architecture-Agnostic Traces for Lightweight Multicore Simulation of CMP and HPC Workloads.
ACM Trans. Archit. Code Optim., 2018

2017
Integrating DRAM power-down modes in gem5 and quantifying their impact.
Proceedings of the International Symposium on Memory Systems, 2017

Crossing the architectural barrier: Evaluating representative regions of parallel HPC applications.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

2016
Exploring system performance using elastic traces: Fast, accurate and portable.
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016

Elastic traces for fast and accurate system performance exploration.
Proceedings of the 2016 IEEE International Symposium on Performance Analysis of Systems and Software, 2016

Identifying representative regions of parallel HPC applications: a cross-architectural evaluation.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016


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