Masahide Inuishi

According to our database, Masahide Inuishi authored at least 3 papers between 1997 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2026

Novel Complementary Reverse Conducting Lateral IGBTs on Bulk Silicon with Multiple Buried Layers for a Common-Emitter Type Inverter.

Zijian Zhang, Xuehao Tang, Masahide Inuishi

IEICE Trans. Electron., 2026

2007

A 65-nm SoC Embedded 6T-SRAM Designed for Manufacturability With Read and Write Operation Stabilizing Circuits.

Shigeki Ohbayashi, Makoto Yabuuchi, Koji Nii, Yasumasa Tsukamoto, Susumu Imaoka, Yuji Oda, Tsutomu Yoshihara, Motoshige Igarashi, Masahiko Takeuchi, Hiroshi Kawashima, Yasuo Yamaguchi, Kazuhiro Tsukamoto, Masahide Inuishi, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara

IEEE J. Solid State Circuits, 2007

1997

A 1-V 46-ns 16-Mb SOI-DRAM with body control technique.

Ken'ichi Shimomura, Hiroki Shimano, Narumi Sakashita, Fumihiro Okuda, Toshiyuki Oashi, Yasuo Yamaguchi, Takahisa Eimori, Masahide Inuishi, Kazutami Arimoto, Shigeto Maegawa, Yasuo Inoue, Shinji Komori, Kazuo Kyuma

IEEE J. Solid State Circuits, 1997