Mauro Pipponzi

According to our database1, Mauro Pipponzi authored at least 6 papers between 1989 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2017
RT Level vs. Microarchitecture-Level Reliability Assessment: Case Study on ARM(R) Cortex(R)-A9 CPU.
Proceedings of the 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2017

2014
Cross-layer early reliability evaluation: Challenges and promises.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

2011
A Low-Cost Emulation System for Fast Co-verification and Debug.
Proceedings of the 16th European Test Symposium, 2011

An FPGA-Emulation-Based Platform for Characterization of Digital Baseband Communication Systems.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011

1990
An iterative algorithm for the binate covering problem.
Proceedings of the European Design Automation Conference, 1990

1989
MSYN: Automatic synthesis of hardware.
Microprocessing and Microprogramming, 1989


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