Montek Singh
Orcid: 0009-0005-3649-4465
According to our database1,
Montek Singh
authored at least 52 papers
between 1996 and 2024.
Collaborative distances:
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Bibliography
2024
Accelerated Event-Based Feature Detection and Compression for Surveillance Video Systems.
Proceedings of the 15th ACM Multimedia Systems Conference, 2024
2023
Proceedings of the 14th Conference on ACM Multimedia Systems, 2023
2019
Implementation and Evaluation of a 50 kHz, $28\mu\mathrm{s}$ Motion-to-Pose Latency Head Tracking Instrument.
IEEE Trans. Vis. Comput. Graph., 2019
2017
Proceedings of the 21st ACM SIGGRAPH Symposium on Interactive 3D Graphics and Games, 2017
Proceedings of the 27th Workshop on Network and Operating Systems Support for Digital Audio and Video, 2017
Proceedings of the 23rd IEEE International Symposium on Asynchronous Circuits and Systems, 2017
2016
From Motion to Photons in 80 Microseconds: Towards Minimal Latency for Virtual and Augmented Reality.
IEEE Trans. Vis. Comput. Graph., 2016
2015
2013
Energy conservation in asynchronous systems using self-adaptive fine-grain voltage scaling.
Proceedings of the International Green Computing Conference, 2013
2012
Proceedings of the Symposium on Interactive 3D Graphics and Games, 2012
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012
2011
Power-Gated Arithmetic Circuits for Energy-Precision Tradeoffs in Mobile Graphics Processing Units.
J. Low Power Electron., 2011
ACM J. Emerg. Technol. Comput. Syst., 2011
Guest Editors' Introduction: Asynchronous Design Is Here to Stay (and Is More Mainstream Than You Thought).
IEEE Des. Test Comput., 2011
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Conference on High Performance Graphics 2011, 2011
2010
An Adaptively Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 Gigahertz.
IEEE Trans. Very Large Scale Integr. Syst., 2010
ACM Trans. Design Autom. Electr. Syst., 2010
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010
Automated Microarchitectural Exploration for Achieving Throughput Targets in Pipelined Asynchronous Systems.
Proceedings of the 16th IEEE International Symposium on Asynchronous Circuits and Systems, 2010
2009
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2009
Bottleneck Analysis and Alleviation in Pipelined Systems: A Fast Hierarchical Approach.
Proceedings of the 15th IEEE Symposium on Asynchronous Circuits and Systems, 2009
2008
Proceedings of the 26th International Conference on Computer Design, 2008
Performance estimation and slack matching for pipelined asynchronous architectures with choice.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Concurrency-Enhancing Transformations for Asynchronous Behavioral Specifications: A Data-Driven Approach.
Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008
2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
IEEE Trans. Very Large Scale Integr. Syst., 2007
2006
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Counterflow pipelining: architectural support for preemption in asynchronous systems using anti-tokens.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006
Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006
2005
Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, 2005
Proceedings of the Second Workshop on Globally Asynchronous, Locally Synchronous Design, 2005
Proceedings of the International Conference on Computer Graphics and Interactive Techniques, 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Memory access optimization of dynamic binary translation for reconfigurable architectures.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005
Proceedings of the ACM SIGGRAPH/EUROGRAPHICS Symposium on Graphics Hardware 2005, 2005
Proceedings of the 11th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2005), 2005
2004
Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures.
Proceedings of the 2004 Design, 2004
2002
2001
Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001
2000
IEEE Trans. Very Large Scale Integr. Syst., 2000
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000
1997
Pattern Recognit., 1997
1996
Proceedings of the Proceedings IEEE International Test Conference 1996, 1996