Nikolaos Chatzivangelis

According to our database, Nikolaos Chatzivangelis authored at least 6 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Soft Error Reliability Analysis & Hardening of NVDLA MAC Units.

Nikolaos Chatzivangelis, Nikolaos Betsos, Georgios Ioannis Paliaroutis, Nikolaos Zazatis, Pelopidas Tsoumanis, Frederic Wrobel, Marko S. Andjelkovic, Christos P. Sotiriou, Luigi Dilillo

Proceedings of the 44th IEEE VLSI Test Symposium, 2026

2025

Special Session Paper: Simulation Methodologies and Experiments for Reliability Analysis of Devices in Radiation Harsh Environments.

Nikolaos Chatzivangelis, Nikolaos Zazatis, Wesley Grignani, Georgios Ioannis Paliaroutis, Douglas A. dos Santos, Carolina Imianosky, Maria Kastriotou, Carlo Cazzaniga, Frédéric Wrobel, Alessandro Veronesi, Christos P. Sotiriou, Marko S. Andjelkovic, Fabian Luis Vargas, Davide Bertozzi, Luigi Dilillo

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2025

Multi-Partner Project: Twinning for Excellence in Reliable Electronics (TWIN-RELECT).

Marko S. Andjelkovic, Fabian Vargas, Milos Krstic, Luigi Dilillo, Alain Michez, Frederic Wrobel, Davide Bertozzi, Mikel Luján, Christos Georgakidis, Nikolaos Chatzivangelis, Katerina Tsilingiri, Nikolaos Zazatis, Georgios Ioannis Paliaroutis, Pelopidas Tsoumanis, Christos P. Sotiriou

Proceedings of the Design, Automation & Test in Europe Conference, 2025

Post-Placement Timing Optimisations on Asynchronous Designs.

Dimitrios Tsalapatas, Nikolaos Chatzivangelis, Christos P. Sotiriou, Nikolaos Sketopoulos

Proceedings of the 29th IEEE International Symposium on Asynchronous Circuits and Systems, 2025

2023

Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static Timing Analysis.

Christos Georgakidis, Dimitris Valiantzas, Stavros Simoglou, Iordanis Lilitsis, Nikolaos Chatzivangelis, Ilias Golfos, Marko S. Andjelkovic, Christos P. Sotiriou, Milos Krstic

Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2023

2022

Simulation-Based Maximum Coverage Hazard Detection and Elimination Analysis, Supporting Combinational Logic Loops.

Nikolaos Chatzivangelis, Dimitris Valiantzas, Christos P. Sotiriou, Iordanis Lilitsis

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022