P. Packan

According to our database1, P. Packan authored at least 4 papers between 2015 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
An Intel 3 Advanced FinFET Platform Technology for High Performance Computing and SOC Product Applications.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

2023

2022

2015
Transistor aging and reliability in 14nm tri-gate technology.
Proceedings of the IEEE International Reliability Physics Symposium, 2015


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