Pablo Peñil

Orcid: 0000-0003-3741-9764

According to our database1, Pablo Peñil authored at least 24 papers between 2010 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2017
High-Level Design of Wireless Sensor Networks for Performance Optimization Under Security Hazards.
ACM Trans. Sens. Networks, 2017

Synthesis of simulation and implementation code for OpenMAX multimedia heterogeneous systems from UML/MARTE models.
Multim. Tools Appl., 2017

CONTREX: Design of embedded mixed-criticality CONTRol systems under consideration of EXtra-functional properties.
Microprocess. Microsystems, 2017

2016
CONTREX: Design of Embedded Mixed-Criticality CONTRol Systems under Consideration of EXtra-Functional Properties.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
Automatic synthesis of communication and concurrency for exploring component-based system implementations considering UML channel semantics.
J. Syst. Archit., 2015

A model-based, single-source approach to design-space exploration and synthesis of mixed-criticality systems.
Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems, 2015

Enhancing analysability and time predictability in UML/MARTE component-based application models.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015

Building a dynamically reconfigurable system through a high development flow.
Proceedings of the 2015 Forum on Specification and Design Languages, 2015

2014
Automatic synthesis of embedded SW for evaluating physical implementation alternatives from UML/MARTE models supporting memory space separation.
Microelectron. J., 2014

Improving the design flow for parallel and heterogeneous architectures running real-time applications: The PHARAON FP7 project.
Microprocess. Microsystems, 2014

The COMPLEX methodology for UML/MARTE Modeling and design space exploration of embedded systems.
J. Syst. Archit., 2014

Automatic Synthesis over Multiple APIs from Uml/Marte Models for Easy Platform Mapping and Reuse.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
UML/MARTE Methodology for Automatic SystemC Code Generation of Openmax Multimedia Applications.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Automatic synthesis from UML/MARTE models using channel semantics.
Proceedings of the 5th International Workshop on Model Based Architecting and Construction of Embedded Systems, 2012

Modeling and simulation of secure wireless sensor network.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

Model-Driven Methodology for the Development of Multi-level Executable Environments.
Proceedings of the Models, Methods, and Tools for Complex Chip Design, 2012

A model-driven methodology for the development of SystemC executable environments.
Proceedings of the Proceeding of the 2012 Forum on Specification and Design Languages, 2012

The COMPLEX Eclipse framework for UML/MARTE specification and design space exploration of embedded systems.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

A MDD methodology for specification of embedded systems and automatic generation of fast configurable and executable performance models.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

2010
Generating heterogeneous executable specifications in SystemC from UML/MARTE models.
Innov. Syst. Softw. Eng., 2010

The SATURN Approach to SysML-Based HW/SW Codesign.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

The SATURN Approach to SysML-Based HW/SW Codesign.
Proceedings of the VLSI 2010 Annual Symposium - Selected papers, 2010

Formal Modeling for UML/MARTE Concurrency Resources.
Proceedings of the 15th IEEE International Conference on Engineering of Complex Computer Systems, 2010

Formal Foundations for MARTE-SystemC Interoperability.
Proceedings of the 2010 Forum on specification & Design Languages, 2010


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