Ricardo P. Jacobi

Orcid: 0000-0002-4520-7641

Affiliations:
  • University of Brasilia, Brazil


According to our database1, Ricardo P. Jacobi authored at least 61 papers between 1993 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2023
An automated approach to estimate player experience in game events from psychophysiological data.
Multim. Tools Appl., May, 2023

Dynamic Difficulty Adjustment by Performance and Player Profile in Platform Game.
Proceedings of the Entertainment Computing - ICEC 2023, 2023

Applicability of Psychophysiological and Perception Data for Mapping Strategies in League of Legends - An Exploratory Study.
Proceedings of the HCI in Games, 2023

2022
Evaluating a Machine Learning-based Approach for Cache Configuration.
Proceedings of the 13th IEEE Latin America Symposium on Circuits and System, 2022

2021
Optimized execution of morphological reconstruction in large medical images on embedded devices.
J. Real Time Image Process., 2021

Dynamic Difficulty Adjustment Using Performance and Affective Data in a Platform Game.
Proceedings of the HCI International 2021 - Late Breaking Papers: Design and User Experience, 2021

2020
Hardware-Based Fast Hybrid Morphological Reconstruction.
IEEE Des. Test, 2020

Design Space Exploration of a Reconfigurable Accelerator in a Heterogeneous Multicore.
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Analysis of Clustering Techniques in MMOG with Restricted Data: The Case of Final Fantasy XIV.
Proceedings of the Design, User Experience, and Usability. Design for Contemporary Interactive Environments, 2020

2019
Roll-Off Displacement in Ex Vivo Experiments of RF Ablation With Refrigerated Saline Solution and Refrigerated Deionized Water.
IEEE Trans. Biomed. Eng., 2019

2018
Estimating Player Experience from Arousal and Valence Using Psychophysiological Signals.
Proceedings of the 17th Brazilian Symposium on Computer Games and Digital Entertainment, SBGames 2018, Foz do Iguaçu, Brazil, October 29, 2018

A Survey on Game Analytics in Massive Multiplayer Online Games.
Proceedings of the 17th Brazilian Symposium on Computer Games and Digital Entertainment, SBGames 2018, Foz do Iguaçu, Brazil, October 29, 2018

Efficient Hardware Implementation of the Fast Hybrid Morphological Reconstruction Algorithm.
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018

2017
Biofeedback Sensors in Electronic Games: A Practical Evaluation.
Proceedings of the 16th Brazilian Symposium on Computer Games and Digital Entertainment, 2017

A Data Analysis of Player in World of Warcraft Using Game Data Mining.
Proceedings of the 16th Brazilian Symposium on Computer Games and Digital Entertainment, 2017

A SVM optimization tool and FPGA system architecture applied to NMPC.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Efficient hardware implementation of morphological reconstruction based on sequential reconstruction algorithm.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

FPGA implementation of a feedforward neural network-based classifier using the xQuant technique.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016
Nonlinear model predictive control hardware implementation with custom-precision floating point operations.
Proceedings of the 24th Mediterranean Conference on Control and Automation, 2016

2015
Besouro: A framework for exploring compliance rules in automatic TDD behavior assessment.
Inf. Softw. Technol., 2015

Computational Cost Reduction in Learned Transform Classifications.
CoRR, 2015

2014
Reconfigurable Games: Games that Change with the Environment.
Proceedings of the 2014 Brazilian Symposium on Computer Games and Digital Entertainment, 2014

A game engine for building ubigames.
Proceedings of the 13th Annual Workshop on Network and Systems Support for Games, 2014

2013
An Ontology-Based Model for Context Information Management in Smart Spaces.
Proceedings of the 2013 IEEE 10th International Conference on Ubiquitous Intelligence and Computing and 2013 IEEE 10th International Conference on Autonomic and Trusted Computing, 2013

uOS: A Resource Rerouting Middleware for Ubiquitous Games.
Proceedings of the 2013 IEEE 10th International Conference on Ubiquitous Intelligence and Computing and 2013 IEEE 10th International Conference on Autonomic and Trusted Computing, 2013

High-level design and synthesis of a MPEG-4 AAC IMDCT module.
Proceedings of the 4th IEEE Latin American Symposium on Circuits and Systems, 2013

2012
A Protein Sequence Analysis Hardware Accelerator Based on Divergences.
Int. J. Reconfigurable Comput., 2012

Hydra: An Ubiquitous Application for Service Rerouting.
Proceedings of the 9th International Conference on Ubiquitous Intelligence and Computing and 9th International Conference on Autonomic and Trusted Computing, 2012

Hardware and software co-design for the AAC audio decoder.
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012

Parallel Simulated Annealing for Fragment Based Sequence Alignment.
Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium Workshops & PhD Forum, 2012

2011
DSOA: A Service Oriented Architecture for Ubiquitous Applications.
Int. J. Handheld Comput. Res., 2011

Uma Abordagem de Integração de Simulação Baseada em Agentes e Mineração de Processos.
Proceedings of the 7th Brazilian Symposium on Information Systems, 2011

A fragment based alignment in linear space.
Proceedings of the 2011 IEEE International Conference on Bioinformatics and Biomedicine Workshops, 2011

2010
A Hardware Accelerator for the Fast Retrieval of DIALIGN Biological Sequence Alignments in Linear Space.
IEEE Trans. Computers, 2010

TDD Effects: Are We Measuring the Right Things?
Proceedings of the Agile Processes in Software Engineering and Extreme Programming, 2010

Um Estudo de caso com o Protótipo de Estimação de Localização baseado em Sistema Multiagente para a melhoria de segurança.
Proceedings of the 6th Brazilian Symposium on Information Systems, 2010

A HMMER hardware accelerator using divergences.
Proceedings of the Design, Automation and Test in Europe, 2010

2009
BRICK: a multi-context expression grained reconfigurable architecture.
Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

Signal Processing Domain Application Mapping on the Brick Reconfigurable Array.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

2008
Challenges of the nanoscale era.
Proceedings of the 21st Annual Symposium on Integrated Circuits and Systems Design, 2008

2007
Proteus: An Architecture for Adapting Web Page on Small-Screen Devices.
Proceedings of the Network and Parallel Computing, IFIP International Conference, 2007

Reconfigurable Architecture for Biological Sequence Comparison in Reduced Memory Space.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

An FPGA-Based Accelerator for Multiple Biological Sequence Alignment with DIALIGN.
Proceedings of the High Performance Computing, 2007

2006
Prototyping time- and space-efficient computations of algebraic operations over dynamically reconfigurable systems modeled by rewriting-logic.
ACM Trans. Design Autom. Electr. Syst., 2006

VoC: a reconfigurable matrix for stereo vision processing.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

2005

VANNGen: a flexible CAD tool for hardware implementation of artificial neural networks.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005

2004
Reconfigurable Systems for Sequence Alignment and for General Dynamic Programming.
Proceedings of the III Brazilian Workshop on Bioinformatics, 2004

Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic.
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004

2003
Efficient Computation of Algebraic Operations over Dynamically Reconfigurable Systems Specified by Rewriting-Logic Environments.
Proceedings of the 23rd International Conference of the Chilean Computer Science Society (SCCC 2003), 2003

Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic.
Proceedings of the 16th Annual Symposium on Integrated Circuits and Systems Design, 2003

Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing.
Proceedings of the Forum on specification and Design Languages, 2003

2002
Architectural Specification, Exploration and Simulation Through Rewriting-Logic.
Rev. Colomb. de Computación, 2002

Applying ELAN Strategies in Simulating Processors over Simple Architectures.
Proceedings of the 2nd International Workshop on Reduction Strategies in Rewriting and Programming, 2002

2001
Making Java Work for Microcontroller Applications.
IEEE Des. Test Comput., 2001

Data Encription in an Electronic Ballot Box.
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001

IDCT Design for JPEG Decompression in an Electronic Ballot Box.
Proceedings of the 14th Annual Symposium on Integrated Circuits and Systems Design, 2001

2000
JPEG Decoding in an Electronic Voting Machine.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

System Design Based on Single Language and Single-Chip Java ASIP Microcontroller.
Proceedings of the 2000 Design, 2000

1998
LogosPGA: Synthesis System for LUT Devices.
Proceedings of the 11th Annual Symposium on Integrated Circuits Design, 1998

1993
A new logic minimization method for multiplexor-based FPGA synthesis.
Proceedings of the European Design Automation Conference 1993, 1993


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