Shailendra Jain

According to our database, Shailendra Jain authored at least 31 papers between 1996 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2024

Development of single linear induction motor for high-speed transit system.

V. Shirish Murty, Shailendra Jain, Amit Ojha

Soft Comput., January, 2024

2022

Analyzing modeled configuration using finite element analysis for performance prediction of LSRM.

V. Shirish Murty, Shailendra Jain, Amit Ojha

Neural Comput. Appl., 2022

2021

Suitability of linear switched Reluctance motor for Advanced Electric Traction System.

V. Shirish Murty, Shailendra Jain, Amit Ojha

Mechatron. Syst. Control., 2021

Advancements in Converter Topology and control Strategies for switched Reluctance motors: Recent Contributions.

V. Shirish Murty, Shailendra Jain, Amit Ojha

Mechatron. Syst. Control., 2021

2019

Five-Level Cascaded H-Bridge MLC-Based Shunt Active Power Filter for Active Harmonics Mitigation in Distributed Network.

Jitendra Tandekar, Amit Ojha, Shailendra Jain

J. Circuits Syst. Comput., 2019

2016

A Review of Some Recently Proposed Topologies for Multilevel DC-AC Conversion.

Rekha Agrawal, Shailendra Jain

J. Circuits Syst. Comput., 2016

Suitability of Reduced Part Count Multilevel Inverter Topologies for Grid Interfacing.

Rekha Agrawal, Shailendra Jain

J. Circuits Syst. Comput., 2016

Unity power factor controller for neutral point clamped active front end converter with DC voltage balancing.

Pradyumn Chaturvedi, Amit Ojha, Shailendra Jain, Arvind Mittal

Proceedings of the IEEE International Conference on Industrial Technology, 2016

Wavelet based real-time power quality monitoring.

Sameer Singh, Bhavna Jain, Shailendra Jain

Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015

Soft Computing Techniques for Static Series Voltage Regulator of Self Excited Induction Generator.

Sachin Tiwari, Sushma Gupta, Shailendra Jain, Bhim Singh

J. Circuits Syst. Comput., 2015

2014

A Novel Multilevel Inverter Based on Switched DC Sources.

Krishna Kumar Gupta, Shailendra Jain

IEEE Trans. Ind. Electron., 2014

Carrier-Based Neutral Point Potential Regulator With Reduced Switching Losses for Three-Level Diode-Clamped Inverter.

Pradyumn Chaturvedi, Shailendra Jain, Pramod Agarwal

IEEE Trans. Ind. Electron., 2014

A solar-powered 280mV-to-1.2V wide-operating-range IA-32 processor.

Sriram R. Vangal, Shailendra Jain, Vivek De

Proceedings of the 2014 IEEE International Conference on IC Design & Technology, 2014

2013

IA-32 Processor with a Wide-Voltage-Operating Range in 32-nm CMOS.

Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Sriram R. Vangal

IEEE Micro, 2013

Prospects of Near-Threshold Voltage Design for Green Computing.

Surhud Khare, Shailendra Jain

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Architecture and configuration of electrified vehicles: A review.

Lalit Kumar, Krishna Kumar Gupta, Shailendra Jain

Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

Power electronic interface for vehicular electrification.

Lalit Kumar, Krishna Kumar Gupta, Shailendra Jain

Proceedings of the 22nd IEEE International Symposium on Industrial Electronics, 2013

2012

A Reconfigurable On-die Traffic Generator in 45nm CMOS for a 48 iA-32 Core Network-on-Chip.

Praveen Salihundam, Mohammed Asadullah Khan, Shailendra Jain, Yatin Vasant Hoskote, Satish Yada, Shasi Kumar, Vasantha Erraguntla, Sriram R. Vangal, Nitin Borkar

Proceedings of the 25th International Conference on VLSI Design, 2012

A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS.

Shailendra Jain, Surhud Khare, Satish Yada, V. Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M. Srinivasan, Arun Kumar, Shasi Kumar, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram R. Vangal, Saurabh Dighe, Gregory Ruhl, Paolo A. Aseron, Howard Wilson, Nitin Borkar, Vivek De, Shekhar Borkar

Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

An IA-32 processor with a wide voltage operating range in 32nm CMOS.

Gregory Ruhl, Saurabh Dighe, Shailendra Jain, Surhud Khare, Satish Yada, V. Ambili, Praveen Salihundam, Shiva Ramani, Sriram Muthukumar, M. Srinivasan, Arun Kumar, Shasi Kumar, Rajaraman Ramanarayanan, Vasantha Erraguntla, Jason Howard, Sriram R. Vangal, Paolo A. Aseron, Howard Wilson, Nitin Borkar

Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

2011

A 2 Tb/s 6 , ˟, 4 Mesh Network for a Single-Chip Cloud Computer With DVFS in 45 nm CMOS.

Praveen Salihundam, Shailendra Jain, Tiju Jacob, Shasi Kumar, Vasantha Erraguntla, Yatin Vasant Hoskote, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar

IEEE J. Solid State Circuits, 2011

A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling.

Jason Howard, Saurabh Dighe, Sriram R. Vangal, Gregory Ruhl, Nitin Borkar, Shailendra Jain, Vasantha Erraguntla, Michael Konow, Michael Riepen, Matthias Gries, Guido Droege, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek K. De, Rob F. Van der Wijngaart

IEEE J. Solid State Circuits, 2011

2010

HP Transforms Product Portfolio Management with Operations Research.

Julie Ward, Bin Zhang, Shailendra Jain, Chris Fry, Thomas Olavson, Holger Mishal, Jason Amaral, Dirk Beyer, Ann Brecht, Brian Cargille, Russ Chadinha, Kathy Chou, Gavin DeNyse, Qi Feng, Cookie Padovani, Sesh Raj, Kurt Sunderbruch, Robert Endre Tarjan, Krishna Venkatraman, Joseph Woods, Jing Zhou

Interfaces, 2010

A 90mW/GFlop 3.4GHz Reconfigurable Fused/Continuous Multiply-Accumulator for Floating-Point and Integer Operands in 65nm.

Shailendra Jain, Vasantha Erraguntla, Sriram R. Vangal, Yatin Vasant Hoskote, Nitin Borkar, Tulasi Mandepudi, V. P. Karthik

Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010

A 48-Core IA-32 message-passing processor with DVFS in 45nm CMOS.

Jason Howard, Saurabh Dighe, Yatin Vasant Hoskote, Sriram R. Vangal, David Finan, Gregory Ruhl, David Jenkins, Howard Wilson, Nitin Borkar, Gerhard Schrom, Fabric Pailet, Shailendra Jain, Tiju Jacob, Satish Yada, Sraven Marella, Praveen Salihundam, Vasantha Erraguntla, Michael Konow, Michael Riepen, Guido Droege, Joerg Lindemann, Matthias Gries, Thomas Apel, Kersten Henriss, Tor Lund-Larsen, Sebastian Steibl, Shekhar Borkar, Vivek De, Rob F. Van der Wijngaart, Timothy G. Mattson

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS.

Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Vasantha Erraguntla, Clark Roberts, Yatin Vasant Hoskote, Nitin Borkar, Shekhar Borkar

IEEE J. Solid State Circuits, 2008

2007

An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS.

Sriram R. Vangal, Jason Howard, Gregory Ruhl, Saurabh Dighe, Howard Wilson, James W. Tschanz, David Finan, Priya Iyer, Arvind P. Singh, Tiju Jacob, Shailendra Jain, Sriram Venkataraman, Yatin Hoskote, Nitin Borkar

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

2006

Testing High-Speed IO Links Using On-Die Circuitry.

Priya Iyer, Shailendra Jain, Bryan Casper, Jason Howard

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

A Dedicated Microcontroller based Fuzzy Controlled Shunt Active Power Filter.

Shailendra Jain, Pramod Agarwal, H. O. Gupta

Intell. Autom. Soft Comput., 2005

2003

Broadband infrastructure - the ultimate guide to building and delivering OSS / BSS from BusinessEdge Solutions (2. ed.).

Shailendra Jain, Mark Hayward, Sharad Kumar

Kluwer, ISBN: 978-1-4020-7378-6, 2003

1996

Implementing Setup Optimization on the Shop Floor.

Shailendra Jain, M. Eric Johnson, Fereydoon Safai

Oper. Res., 1996