Sharadindu Gopal Kirtania

According to our database1, Sharadindu Gopal Kirtania authored at least 10 papers between 2022 and 2025.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2025
Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM.
Proceedings of the IEEE International Reliability Physics Symposium, 2025

Radiation-Resilient Amorphous Indium Oxide FEFETs for Embedded Nonvolatile Memory.
Proceedings of the IEEE International Reliability Physics Symposium, 2025

Analog In-Memory-Compute with Multi-bit Silicon Ferro FinFET Array for Improved Energy and Area Efficiency.
Proceedings of the IEEE International Memory Workshop, 2025

2024
Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate.
CoRR, 2024

Demonstration of On-Chip Switched-Capacitor DC-DC Converters using BEOL Compatible Oxide Power Transistors and Superlattice MIM Capacitors.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

On the Reliability of High-Performance Dual Gate (DG) W-Doped In2O3 FET.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Comprehensive Time Dependent Dielectric Breakdown (TDDB) Characterization of Ferroelectric Capacitors Under Bipolar Stress Conditions.
Proceedings of the IEEE International Reliability Physics Symposium, 2024

2023
Cold-FeFET as Embedded Non-Volatile Memory with Unlimited Cycling Endurance.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Low-Frequency Noise Characteristics of Ferroelectric Field-Effect Transistors.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
A Thousand State Superlattice(SL) FEFET Analog Weight Cell.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022


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