Stefan Dünkel

According to our database1, Stefan Dünkel authored at least 24 papers between 2019 and 2026.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Probabilistic Tree Inference Enabled by FDSOI Ferroelectric FETs.
CoRR, April, 2026

Ferroelectric Digital In-Memory Computing for Scalable, Reliable, and Efficient Similarity Computation.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2026

2025
Symbol Detection in a MIMO Wireless Communication System Using a FeFET-coupled CMOS Ring Oscillator Array.
CoRR, November, 2025

Cryogenic Characterization of Ferroelectric Non-volatile Capacitors.
CoRR, October, 2025

A Bio-inspired Asymmetric Double-Gate Ferroelectric FET for Emulating Astrocyte and Dendrite Dynamics in Neuromorphic Systems.
CoRR, April, 2025

Reconfigurable Time-Domain In-Memory Computing Marco using CAM FeFET with Multilevel Delay Calibration in 28 nm CMOS.
CoRR, April, 2025

Towards Uncertainty-aware Robotic Perception via Mixed-signal BNN Engine Leveraging Probabilistic Quantum Tunneling.
Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024
Paving the Way for Pass Disturb Free Vertical NAND Storage via A Dedicated and String-Compatible Pass Gate.
CoRR, 2024

Charge Trapping and Endurance Degradation in Ferroelectric Field-Effect Transistors.
Proceedings of the 22nd Non-Volatile Memory Technology Symposium, 2024

Reliability Assesement of Ferroelectric nvCAP for Small-Signal Capacitive Read-Out.
Proceedings of the IEEE International Reliability Physics Symposium, 2024


Charge trapping challenges of CMOS embedded complementary FeFETs.
Proceedings of the IEEE International Memory Workshop, 2024

2023
Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator.
Adv. Intell. Syst., June, 2023

Ferroelectric MirrorBit-Integrated Field-Programmable Memory Array for TCAM, Storage, and In-Memory Computing Applications.
CoRR, 2023

Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET.
CoRR, 2023

FeFET-based MirrorBit cell for High-density NVM storage.
CoRR, 2023

Multi-Level Operation of Ferroelectric FET Memory Arrays for Compute-In-Memory Applications.
Proceedings of the IEEE International Memory Workshop, 2023

2022
Ferroelectric FET based Context-Switching FPGA Enabling Dynamic Reconfiguration for Adaptive Deep Learning Machines.
CoRR, 2022

Asymmetric Double-Gate Ferroelectric FET to Decouple the Tradeoff Between Thickness Scaling and Memory Window.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

Experimental fabrication of an ESF3 floating gate flash cell in an FD-SOI process.
Proceedings of the 52nd IEEE European Solid-State Device Research Conference, 2022

2021
Hardware Functional Obfuscation With Ferroelectric Active Interconnects.
CoRR, 2021

Novel embedded single poly floating gate flash demonstrated in 22nm FDSOI technology.
Proceedings of the IEEE International Memory Workshop, 2021

2019
Performance Improvement on HfO2-Based 1T Ferroelectric NVM by Electrical Preconditioning.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Ultra-dense co-integration of FeFETs and CMOS logic enabling very-fine grained Logic-in-Memory.
Proceedings of the 49th European Solid-State Device Research Conference, 2019


  Loading...