Shaza Zeitouni

According to our database1, Shaza Zeitouni authored at least 31 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2023
FLAIRS: FPGA-Accelerated Inference-Resistant & Secure Federated Learning.
Proceedings of the 33rd International Conference on Field-Programmable Logic and Applications, 2023

2022
Hardware entangled security primitives: attacks and defenses.
PhD thesis, 2022


2021
FLGUARD: Secure and Private Federated Learning.
IACR Cryptol. ePrint Arch., 2021

SAFELearn: Secure Aggregation for private FEderated Learning.
IACR Cryptol. ePrint Arch., 2021

Trusted Configuration in Cloud FPGAs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

SoK: Secure FPGA Multi-Tenancy in the Cloud: Challenges and Opportunities.
Proceedings of the IEEE European Symposium on Security and Privacy, 2021

Distributed Memory Guard: Enabling Secure Enclave Computing in NoC-based Architectures.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Invited: Security Beyond Bulk Silicon: Opportunities and Challenges of Emerging Devices.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
SAFE: A Secure and Efficient Long-Term Distributed Storage System.
IACR Cryptol. ePrint Arch., 2020

SoK: On the Security Challenges and Risks of Multi-Tenant FPGAs in the Cloud.
CoRR, 2020

On the Security of Strong Memristor-based Physically Unclonable Functions.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
CHASE: A Configurable Hardware-Assisted Security Extension for Real-Time Systems.
Proceedings of the International Conference on Computer-Aided Design, 2019

HardScope: Hardening Embedded Systems Against Data-Oriented Attacks.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Pushing the Communication Barrier in Secure Computation using Lookup Tables.
IACR Cryptol. ePrint Arch., 2018

It's hammer time: how to attack (rowhammer-based) DRAM-PUFs.
Proceedings of the 55th Annual Design Automation Conference, 2018

Advances and throwbacks in hardware-assisted security: special session.
Proceedings of the International Conference on Compilers, 2018

2017
ACM CCS 2016 Interview, Part 3.
IEEE Secur. Priv., 2017

ACM CCS 2016 Interviews, Part 2.
IEEE Secur. Priv., 2017

ACM CCS 2016 Interviews, Part 1.
IEEE Secur. Priv., 2017

HardScope: Thwarting DOP with Hardware-assisted Run-time Scope Enforcement.
CoRR, 2017

Exploiting PUF Models for Error Free Response Generation.
CoRR, 2017

SeED: secure non-interactive attestation for embedded devices.
Proceedings of the 10th ACM Conference on Security and Privacy in Wireless and Mobile Networks, 2017

ATRIUM: Runtime attestation resilient under memory attacks.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

LO-FAT: Low-Overhead Control Flow ATtestation in Hardware.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
Remanence Decay Side-Channel: The PUF Case.
IEEE Trans. Inf. Forensics Secur., 2016

DARPA: Device Attestation Resilient to Physical Attacks.
Proceedings of the 9th ACM Conference on Security & Privacy in Wireless and Mobile Networks, 2016

GarbledCPU: a MIPS processor for secure computation in hardware.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
Automated Synthesis of Optimized Circuits for Secure Computation.
Proceedings of the 22nd ACM SIGSAC Conference on Computer and Communications Security, 2015

2014
Obscured Asymmetric Crypto-Functions for Secured Identification.
Proceedings of the Fifth International Conference on Emerging Security Technologies, 2014

2013
IP-core protection for a non-volatile Self-reconfiguring SoC environment.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013


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