Jo Vliegen

According to our database1, Jo Vliegen authored at least 33 papers between 2009 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.



In proceedings 
PhD thesis 




FOCUS: Frequency Based Detection of Covert Ultrasonic Signals.
Proceedings of the ICT Systems Security and Privacy Protection, 2022

Energy and side-channel security evaluation of near-threshold cryptographic circuits in 28nm FD-SOI technology.
Proceedings of the CF '22: 19th ACM International Conference on Computing Frontiers, Turin, Italy, May 17, 2022

Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows.
Proceedings of the 40th International Symposium on Reliable Distributed Systems, 2021

SoK - Network Intrusion Detection on FPGA.
Proceedings of the Security, Privacy, and Applied Cryptography Engineering, 2021

RESERVE: Remote Attestation of Intermittent IoT devices.
Proceedings of the SenSys '21: The 19th ACM Conference on Embedded Networked Sensor Systems, Coimbra, Portugal, November 15, 2021

Speed Records in Network Flow Measurement on FPGA.
Proceedings of the 31st International Conference on Field-Programmable Logic and Applications, 2021

Trusted Configuration in Cloud FPGAs.
Proceedings of the 29th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2021

Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021

SHeFU: Secure Hardware-Enabled Protocol for Firmware Updates.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

Balancing elliptic curve coprocessors from bottom to top.
Microprocess. Microsystems, 2019

SHeLA: Scalable Heterogeneous Layered Attestation.
IEEE Internet Things J., 2019

A Novel FPGA Architecture and Protocol for the Self-attestation of Configurable Hardware.
IACR Cryptol. ePrint Arch., 2019

Efficient Utilization of DSPs and BRAMs Revisited: New AES-GCM Recipes on FPGAs.
IACR Cryptol. ePrint Arch., 2019

SACHa: Self-Attestation of Configurable Hardware.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

HEPCloud: An FPGA-Based Multicore Processor for FV Somewhat Homomorphic Function Evaluation.
IEEE Trans. Computers, 2018

High-speed Side-channel-protected Encryption and Authentication in Hardware.
IACR Cryptol. ePrint Arch., 2018

Design of a Fully Balanced ASIC Coprocessor Implementing Complete Addition Formulas on Weierstrass Elliptic Curves.
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018

Hardware Assisted Fully Homomorphic Function Evaluation and Encrypted Search.
IEEE Trans. Computers, 2017

Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA.
Proceedings of the IEEE 2nd International Verification and Security Workshop, 2017

The Monte Carlo PUF.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

PRNGs for Masking Applications and Their Mapping to Evolvable Hardware.
Proceedings of the Smart Card Research and Advanced Applications, 2016

Secure, Remote, Dynamic Reconfiguration of FPGAs.
ACM Trans. Reconfigurable Technol. Syst., 2015

Practical feasibility evaluation and improvement of a pay-per-use licensing scheme for hardware IP cores in Xilinx FPGAs.
J. Cryptogr. Eng., 2015

DynamIA: Dynamic Hardware Reconfiguration in Industrial Applications.
Proceedings of the Applied Reconfigurable Computing - 11th International Symposium, 2015

A single-chip solution for the secure remote configuration of FPGAs using bitstream compression.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2013

Remote FPGA design through eDiViDe - European Digital Virtual Design Lab.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Hardware Strengthening a Distributed Logging Scheme.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

Secure remote reconfiguration of an FPGA-based embedded system.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Side-channel evaluation of FPGA implementations of binary Edwards curves.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

Secure remote reconfiguration of FPGAs.
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

A compact FPGA-based architecture for elliptic curve cryptography over prime fields.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010

Secure FPGA technologies and techniques.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009