Rosario Cammarota

Orcid: 0000-0002-2965-8987

Affiliations:
  • Intel


According to our database1, Rosario Cammarota authored at least 59 papers between 2011 and 2023.

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Bibliography

2023
Hardware-Software Co-design for Side-Channel Protected Neural Network Inference.
IACR Cryptol. ePrint Arch., 2023

High-precision RNS-CKKS on fixed but smaller word-size architectures: theory and application.
IACR Cryptol. ePrint Arch., 2023

FHEmem: A Processing In-Memory Accelerator for Fully Homomorphic Encryption.
CoRR, 2023

Efficient Machine Learning on Encrypted Data Using Hyperdimensional Computing.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023

2022
ModuloNET: Neural Networks Meet Modular Arithmetic for Efficient Hardware Masking.
IACR Trans. Cryptogr. Hardw. Embed. Syst., 2022

Analyzing Security Vulnerabilities Induced by High-level Synthesis.
ACM J. Emerg. Technol. Comput. Syst., 2022

Guarding Machine Learning Hardware Against Physical Side-channel Attacks.
ACM J. Emerg. Technol. Comput. Syst., 2022

MemFHE: End-to-End Computing with Fully Homomorphic Encryption in Memory.
CoRR, 2022

BioHD: an efficient genome sequence search platform using HyperDimensional memorization.
Proceedings of the ISCA '22: The 49th Annual International Symposium on Computer Architecture, New York, New York, USA, June 18, 2022

Adaptive neural recovery for highly robust brain-like representation.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022

Intel HERACLES: Homomorphic Encryption Revolutionary Accelerator with Correctness for Learning-oriented End-to-End Solutions.
Proceedings of the 2022 on Cloud Computing Security Workshop, 2022

2021
Exploring Energy Efficient Architectures for RLWE Lattice-Based Cryptography.
J. Signal Process. Syst., 2021

Tolerating Defects in Low-Power Neural Network Accelerators Via Retraining-Free Weight Approximation.
ACM Trans. Embed. Comput. Syst., 2021

Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security.
ACM J. Emerg. Technol. Comput. Syst., 2021

Guest Editors' Introduction: Special Issue on Top Picks in Hardware and Embedded Security.
IEEE Des. Test, 2021

Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning.
CAAI Trans. Intell. Technol., 2021

Scalable edge-based hyperdimensional learning system with brain-like neural adaptation.
Proceedings of the International Conference for High Performance Computing, 2021

PRID: Model Inversion Privacy Attacks in Hyperdimensional Learning Systems.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

Invited: Security Beyond Bulk Silicon: Opportunities and Challenges of Emerging Devices.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020
Synthesis of Flexible Accelerators for Early Adoption of Ring-LWE Post-quantum Cryptography.
ACM Trans. Embed. Comput. Syst., 2020

CryptoPIM: In-memory Acceleration for Lattice-based Cryptographic Hardware.
IACR Cryptol. ePrint Arch., 2020

TinyGarble2: Smart, Efficient, and Scalable Yao's Garble Circuit.
IACR Cryptol. ePrint Arch., 2020

MP2ML: A Mixed-Protocol Machine Learning Framework for Private Inference.
IACR Cryptol. ePrint Arch., 2020

Trustworthy AI Inference Systems: An Industry Research View.
CoRR, 2020

Toward Trustworthy AI Development: Mechanisms for Supporting Verifiable Claims.
CoRR, 2020

BoMaNet: Boolean Masking of an Entire Neural Network.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

MaskedNet: The First Hardware Inference Engine Aiming Power Side-Channel Protection.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

Developing Privacy-preserving AI Systems: The Lessons learned.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

AHEC: End-to-end Compiler Framework for Privacy-preserving Machine Learning Acceleration.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Exploring Energy Efficient Quantum-resistant Signal Processing Using Array Processors.
IACR Cryptol. ePrint Arch., 2019

nGraph-HE: A Graph Compiler for Deep Learning on Homomorphically Encrypted Data.
IACR Cryptol. ePrint Arch., 2019

nGraph-HE2: A High-Throughput Framework for Neural Network Inference on Encrypted Data.
IACR Cryptol. ePrint Arch., 2019

Post-Quantum Lattice-Based Cryptography Implementations: A Survey.
ACM Comput. Surv., 2019

MaskedNet: A Pathway for Secure Inference against Power Side-Channel Attacks.
CoRR, 2019

ECoST: Energy-Efficient Co-Locating and Self-Tuning MapReduce Applications.
Proceedings of the 48th International Conference on Parallel Processing, 2019

Flexible NTT Accelerators for RLWE Lattice-Based Cryptography.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

PlaidML-HE: Acceleration of Deep Learning Kernels to Compute on Encrypted Data.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018
Domain-specific Accelerators for Ideal Lattice-based Public Key Protocols.
IACR Cryptol. ePrint Arch., 2018

Improving Performance and Mitigating Fault Attacks Using Value Prediction.
Cryptogr., 2018

Special session: Recent developments in hardware security.
Proceedings of the 36th IEEE VLSI Test Symposium, 2018

New Opportunities for Compilers in Computer Security.
Proceedings of the Languages and Compilers for Parallel Computing, 2018

Machine learning IP protection.
Proceedings of the International Conference on Computer-Aided Design, 2018

Value prediction for security (VPsec): Countering fault attacks in modern microprocessors.
Proceedings of the 2018 IEEE International Symposium on Hardware Oriented Security and Trust, 2018

Protecting the supply chain for automotives and IoTs.
Proceedings of the 55th Annual Design Automation Conference, 2018

VPsec: countering fault attacks in general purpose microprocessors with value prediction.
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018

2017
CAMFAS: A Compiler Approach to Mitigate Fault Attacks via Enhanced SIMDization.
IACR Cryptol. ePrint Arch., 2017

Trends, challenges and needs for lattice-based cryptography implementations: special session.
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017

2016
Polygonal Iteration Space Partitioning.
Proceedings of the Languages and Compilers for Parallel Computing, 2016

2015
Fault Tolerant Scheduling for Parallel Loops on Shared Memory Systems.
J. Inf. Sci. Eng., 2015

WebRTCbench: a benchmark for performance assessment of webRTC implementations.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

2014
A Compilation and Run-Time Framework for Maximizing Performance of Self-scheduling Algorithms.
Proceedings of the Network and Parallel Computing, 2014

2013
Effective Evaluation of Multi-core Based Systems.
Proceedings of the IEEE 12th International Symposium on Parallel and Distributed Computing, 2013

On the Determination of Inlining Vectors for Program Optimization.
Proceedings of the Compiler Construction - 22nd International Conference, 2013

Optimizing Program Performance via Similarity, Using a Feature-Agnostic Approach.
Proceedings of the Advanced Parallel Processing Technologies, 2013

2012
Improving Cache Management Policies Using Dynamic Reuse Distances.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Just in Time Load Balancing.
Proceedings of the Languages and Compilers for Parallel Computing, 2012

A fault tolerant self-scheduling scheme for parallel loops on shared memory systems.
Proceedings of the 19th International Conference on High Performance Computing, 2012

Selective search of inlining vectors for program optimization.
Proceedings of the Computing Frontiers Conference, CF'12, 2012

2011
Pruning hardware evaluation space via correlation-driven application similarity analysis.
Proceedings of the 8th Conference on Computing Frontiers, 2011


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