Dong-Hoon Jung

Jong Suk Lim

Sensors, January, 2023

A Study on Design Method of Synchronous Reluctance Motor Based on Nonlinear MEC Using Newton-Raphson Method.

[BibT_eX]

[DOI]

Ki-Deok Lee

Jae-Kwang Lee

IEEE Access, 2023

2021

29.6 A Distributed Digital LDO with Time-Multiplexing Calibration Loop Achieving 40A/mm2 Current Density and 1mA-to-6.4A Ultra-Wide Load Range in 5nm FinFET CMOS.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2019

Lessons Learned from an Auditory-vibrotactile Sensory Experience in the Museum.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM International Conference on Interactive Surfaces and Spaces, 2019

2018

All-Digital Process-Variation-Calibrated Timing Generator for ATE With 1.95-ps Resolution and Maximum 1.2-GHz Test Rate.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2018

0.293-mm2 Fast Transient Response Hysteretic Quasi-V2 DC-DC Converter With Area-Efficient Time-Domain-Based Controller in 0.35-µm CMOS.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2018

2017

GRO-TDC with gate-switch-based delay cell halving resolution limit.

[BibT_eX]

[DOI]

Jung-Hyun Park

Int. J. Circuit Theory Appl., 2017

2016

High-Speed, Low-Power, and Highly Reliable Frequency Multiplier for DLL-Based Clock Generator.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

All-Digital 90° Phase-Shift DLL With Dithering Jitter Suppression Scheme.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

All-Digital ON-Chip Process Sensor Using Ratioed Inverter-Based Ring Oscillator.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2016

Thermal and solar energy harvesting boost converter with time-multiplexing MPPT algorithm.

[BibT_eX]

[DOI]

Ki-Ryong Kim

IEICE Electron. Express, 2016

2015

Level-Converting Retention Flip-Flop for Reducing Standby Power in ZigBee SoCs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

An Energy-Efficient All-Digital Time-Domain-Based CMOS Temperature Sensor for SoC Thermal Management.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

All-Digital Fast-Locking Delay-Locked Loop Using a Cyclic-Locking Loop for DRAM.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2015

2014

Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, 2014

2013

ADDLL for Clock-Deskew Buffer in High-Performance SoCs.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2013

A 0.67nJ/S time-domain temperature sensor for low power on-chip thermal management.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

All-digital process-variation-calibrated timing generator for ATE with 1.95-ps resolution and a maximum 1.2-GHz test rate.

[BibT_eX]

[DOI]

Proceedings of the ESSCIRC 2013, 2013

All-digital 90° phase-shift DLL with a dithering jitter suppression scheme.

[BibT_eX]

[DOI]

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012

A DLL With Dual Edge Triggered Phase Detector for Fast Lock and Low Jitter Clock Generator.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Process Variation Tolerant All-Digital 90° Phase Shift DLL for DDR3 Interface.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Integration of dual channel timing formatter system for high speed memory test equipment.

[BibT_eX]

[DOI]

Proceedings of the International SoC Design Conference, 2012

A low-power and small-area all-digital delay-locked loop with closed-loop duty-cycle correction.

[BibT_eX]

[DOI]

Proceedings of the 38th European Solid-State Circuit conference, 2012

2010

A 90° phase-shift DLL with closed-loop DCC for high-speed mobile DRAM interface.

[BibT_eX]

[DOI]