Takeshi Kumaki

According to our database, Takeshi Kumaki authored at least 35 papers between 2005 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Development and evaluation of the "Stego-panel IV" Invisible information lighting display.

Yuta Moritake, Ryuya Kirihara, Yuki Hirota, Takumi Hayashi, Xiangbo Kong, Takeshi Kumaki

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

Implementation of AI characteristic motion detecting for improper-photography prevention system.

Yusuke Inoue, Xiangbo Kong, Takeshi Kumaki

Proceedings of the 19th International SoC Design Conference, 2022

2021

A Study on Specific Emitter Identification Using Modified Allan Variance and Correlation Coefficient.

Yan Zhu, Sei Arima, Ryo Hirayama, Masaaki Kobayashi, Takeshi Kumaki

Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021

Development of invisible information lighting display "Stego-panel IV".

Yuta Moritake, Yutaro Shimomura, Ryuya Kirihara, Yuki Hirota, Xiangbo Kong, Takeshi Kumaki

Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021

Implementation and Evaluation of Block Cipher Algorithm with Content Addressable Memory-Based Massive-Parallel SIMD Matrix Core.

Sota Arai, Kyosuke Kageyama, Xiangbo Kong, Takeshi Kumaki

Proceedings of the 10th IEEE Global Conference on Consumer Electronics, 2021

2020

Acceleration of arithmetic processing with CAM-based massive-parallel SIMD matrix core.

Kyosuke Kageyama, Kensuke Watanabe, Akimitsu Hamai, Takeshi Kumaki, Tetsushi Koide

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Live Demonstration: Development of LED-Based Stego-Panel for New Smartphone Usage.

Yutaro Shimomura, Takuya Shimada, Ryuya Kirihara, Takeshi Kumaki

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

Distributed Embedding Approach for Max-Plus Algebra-Based Morphological Wavelet Transform Watermarking.

Takeshi Kumaki, Tomohiro Fujita, Takeshi Ogura, P. S. Venugopala

Proceedings of the 17th IEEE International New Circuits and Systems Conference, 2019

Structuring Element-counting Approach for Morphological Pattern Spectrum-based Image Manipulation Detection.

Kyosuke Kageyama, Takeshi Kumaki, Tetsushi Koide

Proceedings of the 2nd International Symposium on Devices, Circuits and Systems, 2019

2017

Hierarchical-Masked Image Filtering for Privacy-Protection.

Takeshi Kumaki, Takeshi Fujino

IEICE Trans. Inf. Syst., 2017

2015

Proposal of LED-based Peeping Prevention System.

Kyosuke Kageyama, Kohei Sugiyama, Takeshi Kumaki, Takeshi Fujino

Proceedings of the IEEE 58th International Midwest Symposium on Circuits and Systems, 2015

Design and LSI prototyping of security module with hardware trojan.

Masaya Yoshikawa, Takuya Tsukadaira, Takeshi Kumaki

Proceedings of the IEEE International Conference on Consumer Electronics, 2015

Development of LED illumination-based spy photo-prevention system.

Kyosuke Kageyama, Kohei Sugiyama, Takeshi Kumaki, Takeshi Fujino

Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

Detection technique for hardware Trojans using machine learning in frequency domain.

Takato Iwase, Yusuke Nozaki, Masaya Yoshikawa, Takeshi Kumaki

Proceedings of the IEEE 4th Global Conference on Consumer Electronics, 2015

2014

Development of Compression Tolerable and Highly Implementable Watermarking Method for Mobile Devices.

Takeshi Kumaki, Kei Nakao, Kohei Hozumi, Takeshi Ogura, Takeshi Fujino

IEICE Trans. Inf. Syst., 2014

Cellular automaton based pixel-level snakes.

Tomohiro Fujita, Syo Sawada, Kaihei Iwanaga, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura

Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014

Live Demonstration: Hierarchical masked image filtering technology on security-camera for privacy protection.

Yuki Yanagihara, Toshiya Honda, Takeshi Kumaki, Takeshi Fujino

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014

Interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processor.

Takeshi Kumaki, Takeshi Fujino, Tetsushi Koide

Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2013

Evaluation of advanced pixel-level snakes on cellular hardware platform.

Matsui Takao, Tomohiro Fujita, Tsuji Yuji, Takeshi Kumaki, Mamoru Nakanishi, Takeshi Ogura

Proceedings of the IEEE 11th International New Circuits and Systems Conference, 2013

Development of effective information-hiding method for embedded systems.

Kei Nakao, Kohei Hozumi, Takeshi Kumaki, Takeshi Ogura, Takeshi Fujino

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Cipher-destroying and secret-key-emitting hardware Trojan against AES core.

Takeshi Kumaki, Masaya Yoshikawa, Takeshi Fujino

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Hierarchical image-scrambling method with scramble-level controllability for privacy protection.

Toshiya Honda, Yuma Murakami, Yuki Yanagihara, Takeshi Kumaki, Takeshi Fujino

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

Hardware Trojan for security LSI.

Masaya Yoshikawa, R. Satoh, Takeshi Kumaki

Proceedings of the IEEE International Conference on Consumer Electronics, 2013

A CAM-Based Separated BTB for a Superscalar Processor.

Kosaku Fukuda, Lin Meng, Takeshi Kumaki, Takeshi Ogura

Proceedings of the First International Symposium on Computing and Networking, 2013

2011

A Scalable Massively Parallel Processor for Real-Time Image Processing.

Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Tetsu Nishijima, Tetsushi Tanizaki, Hiroyuki Yamasaki, Takeaki Sugimura, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Kan Murata, Kanako Yoshida, Eisuke Shimomura, Hideyuki Noda, Yoshihiro Okuno, Shunsuke Kamijo, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto

IEEE J. Solid State Circuits, 2011

Software-Based Parallel Cryptographic Solution with Massive-Parallel Memory-Embedded SIMD Matrix Architecture for Data-Storage Systems.

Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Masaharu Tagami, Masakatsu Ishizaki

IEICE Trans. Inf. Syst., 2011

2010

A scalable massively parallel processor for real-time image processing.

Takashi Kurafuji, Masaru Haraguchi, Masami Nakajima, Takayuki Gyohten, Tetsu Nishijima, Hiroyuki Yamasaki, Yuta Imai, Masakatsu Ishizaki, Takeshi Kumaki, Yoshihiro Okuno, Tetsushi Koide, Hans Jürgen Mattausch, Kazutami Arimoto

Proceedings of the IEEE International Solid-State Circuits Conference, 2010

2008

Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor.

Takeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Takayuki Gyohten, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito

IEICE Trans. Electron., 2008

2007

Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer.

Takeshi Kumaki, Yasuto Kuroda, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito

IEICE Trans. Inf. Syst., 2007

Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory.

Takeshi Kumaki, Yutaka Kono, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch

IEICE Trans. Inf. Syst., 2007

Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor.

Takeshi Kumaki, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito

IEICE Trans. Inf. Syst., 2007

Efficient Vertical/Horizontal-Space 1D-DCT Processing Based on Massive-Parallel Matrix-Processing Engine.

Takeshi Kumaki, Tetsushi Koide, Hans Jürgen Mattausch, Yasuto Kuroda, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006

A flexible multiport content-addressable memory.

Takeshi Kumaki, Keisuke Iwai, Takakazu Kurokawa

Syst. Comput. Jpn., 2006

Application of Multi-ported CAM for Parallel Coding.

Takeshi Kumaki, Y. Kouno, Masakatsu Ishizaki, Tetsushi Koide, Hans Jürgen Mattausch

Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005

CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example].

Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005